IP Library Granted Patent US 7,370,178
Granted Patent B1
US 7,370,178 · App. 11/485,959 · Granted May 6, 2008

Method for latest producer tracking in an out-of-order processor, and applications thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,370,178
App. No.
11/485,959
Granted
May 6, 2008
Kind
B1
Abstract

Methods for latest producer tracking in a processor. In one embodiment, the method includes the steps of (1) writing a physical register identification value in a first register rename map location specified by a first instruction, (2) writing a first in-register status value in a second register rename map location specified by the first instruction, (3) writing a producer tracking status value at a producer tracking map location specified by the physical register identification value, and (4) modifying, upon graduation of the first instruction, the first in-register status value only if the producer tracking map location stores the producer tracking status value written in step (3). Other methods are also presented.

Claims (26)

1. A method for tracking data in a processor, comprising:

(1) writing a physical register identification value in a first register rename map location specified by a first instruction;

(2) writing a first in-register status value in a second register rename map location specified by the first instruction;

(3) writing a producer tracking status value in a producer tracking map location specified by the physical register identification value; and

(4) modifying, upon graduation of the first instruction, the first in-register status value only if the producer tracking map location stores the producer tracking status value written in step (3).

2. The method of claim 1 , wherein step (1) comprises writing a physical register identification value in a first register rename map location specified by a destination operand of a first instruction.

3. The method of claim 1 , wherein the first in-register status value consists of a single bit, and step (2) comprises writing a zero.

4. The method of claim 1 , wherein the producer tracking status value consists of a single bit, and step (3) comprises writing a one.

5. The method of claim 1 , wherein the producer tracking status value consists of a single bit, and step (4) comprises changing the first in-register status value to one.

6. The method of claim 1 , further comprising:

(5) changing, upon graduation of the first instruction, the producer tracking status value written in step (3).

7. The method of claim 6 , wherein the producer tracking status value consists of a single bit, and step (5) comprises changing the producer tracking status value from one to zero.

8. A method for modifying an in-register status value in a processor, comprising:

(1) determining a buffer identification value and a physical register identification value for a graduating instruction;

(2) reading a producer tracking status value stored in a producer tracking map location specified by the buffer identification value; and

(3) modifying an in-register status value specified by the physical register identification value only if the producer tracking status value indicates the graduating instruction is a latest producer of a value associated with a physical register specified by the physical register identification value.

9. The method of claim 8 , wherein the producer tracking status value consists of a single bit, and step (2) comprises reading the bit.

10. The method of claim 8 , wherein the in-register status value consists of a single bit, and step (3) comprises changing the in-register status value specified by the physical register identification value to one only if the producer tracking status value indicates the graduating instruction is a latest producer of a value associated with a physical register specified by the physical register identification value.

11. The method of claim 10 , wherein the producer tracking status value consists of a single bit, and step (3) comprises changing the in-register status value specified by the physical register identification value to one only if the producer tracking status value is equal to one.

12. A method for modifying producer tracking values in a processor, comprising:

(1) allocating a buffer identification value for an instruction;

(2) writing a first producer tracking value in a first location of a producer tracking map specified by the buffer identification value; and

(3) writing, upon graduation of the instruction, a second producer tracking value in the first location of the producer tracking map.

13. The method of claim 12 , wherein step (1) comprises allocating a buffer identification value only for an instruction that produces a value.

14. The method of claim 12 , wherein step (2) comprises writing a value of one in the first location of the producer tracking map.

15. The method of claim 12 , wherein step (3) comprises writing a value of zero in the first location of the producer tracking map.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: BRIDGE CROSSING, LLC
To: ARM FINANCE OVERSEAS LIMITED
Reel/Frame 033074/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2013
From: MIPS TECHNOLOGIES, INC.
To: BRIDGE CROSSING, LLC
Reel/Frame 030202/0440 →
RELEASE OF SECURITY INTEREST Recorded Dec 16, 2008
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 021985/0015 →
SECURITY AGREEMENT Recorded Aug 24, 2007
From: MIPS TECHNOLOGIES, INC.
To: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 019744/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2006
From: SVENDSEN, KJELD; JIANG, XING YU
To: MIPS TECHNOLOGIES, INC.
Reel/Frame 018057/0982 →