Efficient bitstream compression
View Patent ↗According to one embodiment of the invention, a method of generating a compressed configuration bitstream for a programmable logic device comprises encoding the most-prevalent data word within the configuration data of the bitstream into a first type of code word; encoding a set of more-prevalent data words within the configuration data into a second type of codeword; and identifying in the compressed bitstream at least some of the data words that are members of the set of more-prevalent data words.
1. A programmable logic device comprising:
a bitstream decompressor adapted to decompress a compressed configuration bitstream comprised of a plurality of codewords into corresponding data words of an uncompressed configuration bitstream, the bitstream decompressor including:
a buffer for receiving the compressed configuration bitstream, the buffer including shifting logic configured to shift the bitstream through the buffer such that following a shift of a codeword out of the buffer, a codeword to-be-decoded in the buffer has a known position in the buffer; and
a Huffman decoder for decoding the codeword to-be-decoded in the known position in the buffer, wherein the Huffman decoder includes a first multiplexer adapted to select from a set of more-prevalent data words and a second multiplexer adapted to select from a null data word and the output of the first multiplexer.
2. The programmable logic device of claim 1 , wherein the buffer stores the received bitstream in a memory arranged from a first bit to a last bit, and wherein the buffer further includes a pointer logic configured to generate a pointer signal indicating a bit position in the memory of a next-to-be-decoded codeword.
3. The programmable logic device of claim 1 , wherein the second multiplexer is further adapted to select from the null data word, the output of the first multiplexer, and the buffer's memory.
4. A programmable logic device including a bitstream decompressor for decompressing a configuration bitstream containing configuration data encoded therein, the bitstream decompressor comprising:
a Huffman decoder adapted to decode a codeword within the configuration bitstream into a corresponding data word, the Huffman decoder including:
a first multiplexer responsive to certain bits within a codeword for selecting a corresponding data word that is stored in the device and is from a set of more-prevalent data words included in the configuration data; and
a second multiplexer responsive to a flag within the codeword for selecting a corresponding data word from the data word selected by the first multiplexer and a data word that is the most-prevalent data word in the configuration data.
5. The programmable logic device of claim 1 , wherein the second multiplexer is further responsive to the flag within the codeword for selecting a corresponding data word from the most-prevalent data word, the data word selected by the first multiplexer, and a data word within the codeword.
6. The programmable logic device of claim 1 , wherein the programmable logic device is adapted to store within the device, for selection by the first multiplexer, data words that are included in the configuration bitstream and are members of the set of more-prevalent data words.