Semiconductor device and method for manufacturing the same
View Patent ↗A semiconductor device may include a semiconductor substrate having a recessed surface, a gate insulating layer formed on the recessed surface of the semiconductor substrate, a gate electrode formed on the gate insulating layer, and a source/drain area formed at both sides of the gate electrode, according to embodiments.
1. A method comprising:
sequentially forming an oxide layer, a nitride layer and a photoresist film on a semiconductor substrate, wherein the first photoresist is formed directly on and contacting the nitride layer;
simultaneously removing a portion of the nitride layer and the oxide layer using the first photoresist film as a mask to expose a portion of the semiconductor substrate;
forming a wet oxide layer on the exposed portion of the semiconductor substrate and contacting sidewalls of the oxide layer and the nitride layer;
forming a recessed surface in the exposed portion of the semiconductor substrate by removing the wet oxide layer;
forming a gate insulating layer on the recessed surface of the semiconductor substrate;
forming a gate electrode over the gate insulating layer; and
forming sidewall on sides of the gate electrode and the gate insulating layer such that the uppermost surface of the sidewalls are coplanar with the uppermost surface of the gate electrode;
implanting dopants on both sides of the gate electrode to form a source/drain area.
2. The method of claim 1 , wherein the wet oxide layer is removed using an HF solution.
3. The method of claim 1 , wherein the wet oxide layer is removed using oxygen and hydrogen.
4. The method of claim 1 , comprising forming a portion of the gate electrode with a height substantially equal to a height of the source/drain area.
5. The method of claim 1 , comprising forming the gate insulating layer to have a substantially concave shape.
6. The method of claim 1 , comprising forming the gate electrode to have a bottom surface having a substantially concave shape.
7. A method comprising:
forming a recessed surface on a semiconductor substrate by wet-etching a prescribed portion of the semiconductor substrate;
forming a gate insulating layer on the recessed surface of the semiconductor substrate;
forming a gate electrode on the gate insulating layer;
forming sidewalls on lateral sides of the gate electrode and the gate insulating layer such that the entire uppermost surface of the sidewalls is coplanar with the uppermost surface of the gate electrode; and then
implanting dopants on the sides of the gate electrode to form a source/drain area.
8. The method of claim 7 , wherein a portion of the gate electrode is formed to have a height substantially equal to a height of the source/drain area.
9. The method of claim 7 , wherein the gate insulating layer is formed in a substantially concave shape.
10. The method of claim 7 , wherein the gate electrode is formed to have a bottom surface with a substantially concave shape.
11. A method comprising:
sequentially forming a first oxide layer, a nitride layer and a first photoresist film on a semiconductor substrate;
exposing a portion of the uppermost surface of the semiconductor substrate by performing a first etching process on the nitride layer and the first oxide layer using the first photoresist film as a mask; and then
removing the first photoresist film; and then
forming a second oxide layer on the exposed portion of the semiconductor substrate and contacting sidewalls of the first oxide layer and the nitride layer by feeding gaseous oxygen (O 2 ) and gaseous hydrogen (H 2 ) under a high temperature condition; and then
forming a recess in the exposed portion of the semiconductor substrate by removing the second oxide layer using an hydrofluoric acid (HF) solution; and then
removing the nitride layer and the first oxide layer to expose the uppermost surface of the semiconductor substrate; and then
sequentially forming a gate insulating layer, a poly-silicon layer and a second photoresist film on the semiconductor substrate including in the recess; and then
forming a buried electrode in the recess by performing a second etching process on the poly-silicon layer; and then
forming sidewalls on lateral sides of the buried gate electrode and the gate insulating layer.
12. The method of claim 11 , further comprising, after forming the recess in the exposed portion of the semiconductor substrate and before forming a buried electrode in the recess:
forming a well in the semiconductor substrate by implanting low-density conductive materials therein.
13. The method of claim 11 , wherein sequentially forming a gate insulating layer and a poly-silicon layer further comprises forming a second photoresist film on the poly-silicon layer, wherein the second photoresist film is used as an etch mask to form the buried gate electrode.
14. The method of claim 11 , further comprising, after forming sidewalls on lateral sides of the buried gate electrode and the gate insulating layer:
forming source and drain areas in the semiconductor substrate by implanting high-density dopants in the semiconductor substrate using the buried gate electrode as a mask.
15. The method of claim 11 , wherein the second oxide layer comprises a wet oxide layer.
16. The method of claim 11 , wherein the uppermost surface of the sidewalls are coplanar with the uppermost surface of the gate electrode.