IP Library Granted Patent US 7,396,758
Granted Patent B2
US 7,396,758 · App. 11/619,502 · Granted Jul 8, 2008

Polycarbosilane buried etch stops in interconnect structures

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Quick Facts
Patent No.
US 7,396,758
App. No.
11/619,502
Granted
Jul 8, 2008
Kind
B2
Abstract

Interconnect structures having buried etch stop layers with low dielectric constants and methods relating to the generation of such buried etch stop layers are described herein. The inventive interconnect structure comprises a buried etch stop layer comprised of a polymeric material having a composition Si v N w C x O y H z , where 0.05≦v≦0.8, 0≦w≦0.9, 0.05≦x≦0.8, 0≦y≦0.3, 0.05≦z≦0.08 for v+w+x+y+z=1; a via level interlayer dielectric that is directly below said buried etch stop layer; a line level interlayer dielectric that is directly above said buried etch stop layer; and conducting metal features that traverse through said via level dielectric, said line level dielectric, and said buried etch stop layer.

Claims (5)

1. A method for generating an interconnect structure comprising:

first depositing a via level interlayer dielectric;

second depositing a buried etch stop layer having a composition Si v N w C x O y H z , where 0.05≦v≦0.8, 0≦w≦0.9, 0.05≦x≦0.8, 0≦y≦0.3, 0.05≦z≦0.8 for v+w+x+y+z=1 atop said via level interlayer dielectric by a solvent based approach, said solvent based approach comprises a solution including a polymeric material precursor, an antistriation agent and an organic solvent selected from a group consisting of: propylene glycol methyl ether acetate (PGMEA), propylene glycol methyl ether (PGME), toluene, xylenes, anisole, mesitylene, butyrolactone, cyclohexanone, hexanones, ethyl lactate, and heptanones;

third depositing a line level interlayer dielectric atop said buried etch stop layer; and

annealing said via level interlayer dielectric, said line level interlayer dielectric, said buried etch stop layer, or a combination of said line level interlayer dielectric, said via level interlayer dielectric and said buried etch stop layer by a process selected from the group consisting of: thermal curing, electron irradiation, ion irradiation, or irradiation with ultraviolet or visible light.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: ALSEPHINA INNOVATIONS, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 053351/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049709/0871 →