Structure and method for wire bond integrity check on BGA substrates using indirect electrical interconnectivity pathway between wire bonds and ground

1 . A BGA integrated circuit package comprising:

a BGA substrate having conducting bond fingers and a grounded feature on a first side thereof;

an IC die, said IC die electrically connected to said conducting bond fingers with wire bonds;

said BGA substrate configured to be formed into a singulated unit with said IC die;

wherein said BGA substrate does not have direct electrical connection on said first side thereof between said bond fingers and said grounded feature;

said BGA substrate including an indirect electrical connection pathway from each said wire bond to said grounded feature that enables electrical integrity testing for said wire bonds;

said indirect electrical connection pathway configured so that at least a portion of each said indirect electrical connection pathway is not present on said singulated unit.

2 . The integrated circuit package of claim 1 , wherein

a) said BGA substrate includes a first BGA IC package body region, and a second region outside said BGA IC package body; and

b) said indirect electrical connection pathway from said wire bonds to said grounded feature includes an electrical connection between said grounded feature on said substrate first side and solder ball pads on a second side of substrate, said solder ball pads being electrically connected to said bond fingers by vias in said first BGA IC package body region;

c) said electrical connection being in said second region outside said BGA IC package body.

3 . The integrated circuit package of claim 2 , wherein

a) said electrical connection between said grounded feature on said substrate strip first side and said solder ball regions on said at least one substrate second side comprises a dummy bypass via between said substrate first side and said substrate second side;

b) said dummy bypass via being in said second region outside said BGA IC package body, said dummy bypass via being electrically connected to said solder ball pads regions on said substrate, and to said grounded feature on said substrate first side.

4 . The integrated circuit package of claim 3 , wherein said dummy bypass via is electrically connected to a second side tie bar which is electrically connected to said solder ball pad regions by Cu traces; and wherein said bypass via is electrically connected to said grounded feature by a Cu trace.

5 . The integrated circuit package of claim 1 , wherein said grounded feature is said mold gates.

6 . The integrated circuit package of claim 1 , wherein said BGA IC package body is selected from the group consisting of:

FBGA (Fine Pitch Ball Grid Array), high density (Line and Space) and Ball Pad OSP surface finish PCB/substrate, standard BGA, Chip Scale Packaging (CSP), and system scale PCB's.

7 . A method for bonding an integrated circuit (IC) die to a BGA substrate, said BGA substrate configured to be formed into a singulated unit with said IC die, said method including testing electrical integrity of a wire bond between a) a bond finger on a first side of said BGA substrate and b) a bonding pad on said IC die, wherein said substrate does not have direct electrical connections on said first side between said bond fingers and a grounded feature on said first side; the method comprising the steps of:

applying a voltage through said wire bond on said BGA substrate to said grounded feature, through an indirect electrical connection pathway at least a portion of which is not present on said singulated unit; and

measuring if there is current flow through said pathway.

8 . The method of claim 7 , wherein said wire bond is performed by an automated wire bonding machine, and wherein;

if there is no said current flow through said pathway, said automated wire bonding machine is stopped and operator assistance is requested.

9 . The method of claim 7 , wherein;

said BGA substrate includes a first BGA IC package body region, and a second region outside said BGA IC package body; and

said indirect electrical connection pathway includes a dummy bypass via through said BGA substrate, in said second region outside said BGA IC package body.

10 . The method of claim 9 , wherein said indirect electrical connection pathway comprises:

a) said wire bond electrically connected to said bond finger;

b) said bond finger electrically connected to a conducting via through said substrate in said first region;

c) said conducting via electrically connected to a solder ball pad on a second side of said substrate;

d) said solder ball pad electrically connected to a second side tie bar on said second side of said substrate, through conducting traces;

e) said second side tie bar electrically connected to said conducting dummy bypass via;

f) said conducting dummy bypass via electrically connected to said grounded feature on said top side in said second region;

g) wherein said dummy bypass via is disconnected from said solder ball pad when said BGA substrate is formed into a singulated unit.

11 . The method of claim 8 , further including the steps of:

a) mounting said IC die on said BGA package substrate;

b) said automated wire bonding machine attaching a first end of a bonding wire to a bonding pad on said IC with a first wire bond;

c) before or after step b), said automated wire bonding machine attaching a second end of said bonding wire to a bond finger on said BGA package substrate with a second wire bond, prior to said step of applying a voltage through said second wire bond on said substrate to said grounded feature through an indirect electrical connection pathway at least a portion of which is not present on said singulated unit; and

d) if the electrical integrity of second wire bond is determined to be good, said automated wire bonding machine cutting the unbonded portion of said bonding wire.

12 . The method of claim 11 , wherein steps b)-d) are repeated for each said bonding wire attaching said IC to said substrate.

13 . The method of claim 10 , wherein said grounded feature is a mold gate.

14 . The method of claim 11 , wherein said first wire bond is a ball bond and said second wire bond is a wedge bond.

15 . The method of claim 7 , wherein said BGA substrate is selected from the group consisting of:

FBGA (Fine Pitch Ball Grid Array), high density (Line and Space) and Ball Pad OSP surface finish PCB/substrate, standard BGA, Chip Scale Packaging (CSP), and system scale PCB's.

16 . An integrated circuit (IC) die packaged with a BGA substrate, said BGA substrate configured to be formed into a singulated unit with said IC die; formed by a method comprising the steps of:

a) making electrical connections between said IC die and said BGA substrate, by forming wire bonds with bonding wires between bonding pads on said IC and bond fingers on a first side of said BGA substrate, including forming bond finger wire bonds;

b) testing the electrical integrity of each said bond finger wire bond by

1) sending a voltage pulse through each said bond finger wire bond on said BGA substrate to a grounded feature on said first side of said BGA substrate strip, through an indirect electrical connection pathway at least a portion of which is not present on said singulated unit;

wherein said substrate does not have direct electrical connections on said first side between said bond fingers and said grounded feature; and

2) measuring if there is current flow through said pathway.

17 . The integrated circuit (IC) die mounted on and packaged with a BGA substrate as in claim 16 , formed by a method further comprising the steps of:

a) forming a package mold on said BGA substrate;

b) attaching solder balls to a second side of said BGA substrate; and

c) singulating said BGA substrate.

18 . The integrated circuit die of claim 16 , wherein said wire bonds are formed by an automated wire bonding machine, and wherein;

if there is no said current flow through said indirect electrical connection pathway, said automated wire bonding machine is stopped and operator assistance is requested.

19 . The method of claim 16 , wherein;

said BGA substrate includes a first BGA IC package body region, and a second region outside said BGA IC package body; and

said indirect electrical connection pathway includes a dummy bypass via through said BGA substrate, in said second region outside said BGA IC package body.

20 . The integrated circuit die of claim 19 , wherein said indirect electrical connection pathway comprises:

a) said wire bond electrically connected to said bond finger;

b) said bond finger electrically connected to a conducting via through said substrate in said first region;

c) said conducting via electrically connected to a solder ball pad on said second side of said substrate;

d) said solder ball pad electrically connected to a bottom side tie bar on said bottom side of said first substrate, through conducting traces;

e) said second side tie bar electrically connected to said conducting dummy bypass via;

f) said dummy bypass via electrically connected to said grounded feature on said top side in said second region;

g) wherein said dummy bypass via is disconnected from said solder ball pad when said BGA substrate is formed into a singulated unit.

21 . The method of claim 16 , wherein said grounded feature is a mold gate.

22 . The method of claim 16 , wherein said BGA substrate is selected from the group consisting of:

FBGA (Fine Pitch Ball Grid Array), standard BGA, Chip Scale Packaging (CSP), and system scale PCB's.