Schottky diode structure with silicon mesa and junction barrier Schottky wells
View Patent ↗A power diode having a silicon mesa atop the drift region includes a first contact positioned on the silicon mesa. The silicon mesa is highly doped p-type or n-type, and the anode may be formed on the mesa. The mesa may include two separate silicon layers, one of which is a Schottky barrier height layer. Under a forward bias, the silicon mesa provides carriers to achieve desirable forward current characteristics. The substrate has a significantly reduced thickness. The diode achieves reverse voltage blocking capability by implanting junction barrier Schottky wells within the body of the diode. The diode utilizes a deeper portion of the drift region to support the reverse bias. The method of forming the diode with a silicon mesa includes forming the mesa within a window on the diode or by thermally or mechanically bonding the silicon layer to the drift region.
1. A Schottky diode comprising:
a first semiconductor layer of a first conductivity type forming a drift region, said drift region having a first surface and a second surface;
at least one doped well within a conductive channel in said drift region and adjacent said first surface, said doped well having an opposite conductivity type as said drift region; and
a silicon mesa on said first surface of said drift region adjacent said doped well.
2. A Schottky diode according to claim 1 , wherein said silicon mesa comprises a silicon Schottky barrier layer on said drift region and a second layer of silicon on said barrier layer.
3. A Schottky diode according to claim 1 , wherein said drift region is N− type silicon carbide, said well is p+ type silicon carbide, and said mesa is n type silicon.
4. A Schottky diode according to claim 1 , wherein said drift region is N− type silicon carbide, said well is p+ type silicon carbide, and said mesa is p+ type silicon.
5. A Schottky diode according to claim 1 , wherein said drift region further comprises termination wells at said first surface and adjacent edges of said mesa, said termination wells arresting current flow at said edges.
6. A Schottky diode according to claim 1 , further comprising a conductive substrate on said second surface of said drift region.
7. A Schottky diode according to claim 6 , wherein said substrate is less than about 100 microns thick.
8. A Schottky diode according to claim 7 , wherein said substrate is less than about 25 microns thick.
9. A Schottky diode according to claim 6 , further comprising a cathode contact on a surface of said substrate opposite said drift region.
10. A Schottky diode according to claim 1 , further comprising an anode contact on said mesa.
11. A Schottky diode according to claim 1 , further comprising a passivation layer covering sides of said mesa and the first surface of said drift region adjacent said mesa.
12. A Schottky diode according to claim 1 , wherein said drift region is about 25 microns thick.
13. A Schottky diode according to claim 1 , wherein said drift region is doped to about 3×10 15 cm −3 .
14. A Schottky diode comprising:
a drift region of a first conductivity type, said drift region having a first surface and a second surface;
at least one doped well within a conductive channel in said drift region and adjacent said first surface; said doped well having an opposite conductivity type as said drift region;
a silicon mesa on said first surface of said drift region adjacent said doped well, wherein said drift region supports a maximum electric field without breakdown throughout a thickness of more than one micron in said drift region.
15. A Schottky diode according to claim 14 , wherein said maximum electric field is greater than 1.4 x 10 6 V/cm.
16. A Schottky diode according to claim 14 , wherein said diode has a current density that is greater than 50 amps/cm 2 at an anode voltage of 2 volts.
17. A Schottky diode according to claim 14 , wherein the maximum reverse blocking voltage is greater than 2800 V.
18. Schottky diode according to claim 14 , wherein said drift region is n— type silicon carbide, said well is p+ type silicon carbide, and said mesa is n type_silicon.
19. A Schottky diode according to claim 14 , wherein said drift region is n— type silicon carbide, said well is p+ type silicon carbide, and said mesa is p+ type silicon.
20. A Schottky diode according to claim 14 , wherein said drift region further comprises termination wells at said first surface and adjacent edges of said mesa, said termination wells arresting current flow at said edges.
21. A Schottky diode according to claim 14 , further comprising a conductive substrate on said second surface of said drift region.
22. A Schottky diode according to claim 21 , wherein said substrate is less than about 100 microns thick.
23. A Schottky diode according to claim 22 , further comprising a cathode contact on a surface of said substrate opposite said drift region.
24. A Schottky diode according to claim 14 , further comprising an anode contact on said mesa.
25. A Schottky diode according to claim 14 , further comprising a passivation layer covering sides of said mesa and the first surface of said drift region adjacent said mesa.
26. A Schottky diode according to claim 14 , wherein said drift region is about 25 microns thick.
27. A Schottky diode according to claim 14 , wherein said drift region is doped to about 3×10 15 cm −3 .
28. A Schottky diode according to claim 14 , wherein said silicon mesa comprises a silicon Schottky barrier layer on said drift region and a second layer of silicon on said barrier layer.
29. A Schottky diode comprising:
a first silicon carbide layer of a first conductivity type forming a drift region, said drift region having a first surface and a second surface;
at least one doped well substantially within a conductive channel in said drift region and adjacent said first surface, said doped well having an opposite conductivity type as said drift region; and
a silicon mesa on said first surface of said drift region adjacent said doped well.
30. A Schottky diode according to claim 29 , wherein said silicon mesa comprises a silicon Schottky barrier layer on said drift region and a second layer of silicon on said barrier layer.
31. A Schottky diode according to claim 29 , wherein said silicon mesa has the same conductivity type as said drift region.
32. A Schottky diode according to claim 29 , wherein said silicon mesa has the opposite conductivity type of said drift region.
33. A Schottky diode according to claim 29 , wherein said drift region further comprises termination wells at said first surface and adjacent edges of said mesa, said termination wells arresting current flow at said edges.
34. A Schottky diode according to claim 29 , further comprising a conductive substrate on said second surface of said drift region.
35. A Schottky diode according to claim 34 , wherein said substrate is less than about 100 microns thick.
36. A Schottky diode according to claim 35 , wherein said substrate is less than about 25 microns thick.
37. A Schottky diode according to claim 35 , further comprising a cathode contact on a surface of said substrate opposite said drift region.
38. A Schottky diode according to claim 29 , further comprising an anode contact on said mesa.
39. A Schottky diode according to claim 29 , further comprising a passivation layer covering sides of said mesa and the first surface of said drift region adjacent said mesa.
40. A Schottky diode according to claim 29 , wherein said drift region is about 25 microns thick.
41. A Schottky diode according to claim 29 , wherein said drift region is doped to about 3×10 15 cm −3 .