Padé approximant based compensation for integrated sensor modules and the like
View Patent ↗Methods and systems using Pade' Approximant expansion ratios provide mappings between nonlinear sensors and a more linearized output domain. In one embodiment (a) a variable gain amplifier receives a supplied input signal, the amplifier has at least a first input terminal, an output terminal, and a gain control terminal; (b) a first summer coupled to the output terminal of the variable gain amplifier adds in a first offset signal; (c) a first multiplier coupled to an output of the first summer receives a proportional feedback factor signal and correspondingly generates a multiplied feedback; (d) a second summer coupled to an output terminal of the first multiplier adds in a corresponding second offset signal; and (e) a second multiplier coupled to an output of the second summer receives a gain factor signal and generates a multiplied gain signal; where the gain control terminal of the variable gain amplifier is operatively coupled to an output terminal of the second multiplier.
1. A mapping circuit for providing nonlinear mapping between different input values represented by an input signal and corresponding output values represented by an output signal, the circuit comprising:
(a) a first input node for receiving a variable first input signal;
(b) a first output node for outputting a corresponding first output signal that is a function of the first input signal in accordance with said nonlinear mapping; and
(c) multiplier means operatively coupled to the first input node and to the first output node for causing successive ones of output values represented by the first output signal to each not only be a function of a corresponding represented input value of the first input signal but to also simultaneously be a function of a product that includes the represented output value of the first output signal multiplied by the corresponding represented input value of the first input signal.
2. The mapping circuit of claim 1 wherein:
(c.1) said multiplier means includes first and second analog input terminals for receiving respective first and second analog multiplicand signals and an analog output terminal for outputting an analog and corresponding product signal.
3. The mapping circuit of claim 1 wherein:
(c.1) said multiplier means includes a digital first input port for receiving a respective first and digital multiplicand signal, an analog second input port for receiving a respective second and analog multiplicand signal, and an analog output port for outputting an analog and corresponding product signal.
4. The mapping circuit of claim 1 wherein
said nonlinear mapping between the input values and the output values is expressible as an output over input ratio having a numerator polynomial and a denominator polynomial with a plurality of coefficients provided among the numerator and denominator polynomials, and said mapping circuit further comprises:
(d) coefficient adjusting means for adjusting signals representing at least two of said plurality of coefficients and thereby adjustably defining the nonlinear mapping.
5. The mapping circuit of claim 4 wherein:
(d.1) said coefficient adjusting means is restricted to adjusting no more than N of said plurality of coefficients, and N is an integer between 2 and 5 inclusively.
6. The mapping circuit of claim 4 wherein:
(d.1) said coefficient adjusting means is structured to adjust only 3 of said plurality of coefficients and to thereby adjustably defining the nonlinear mapping.
7. The mapping circuit of claim 4 wherein:
said output over input ratio is a first order Padé Approximant ratio having only 3 adjustable coefficients.
8. The mapping circuit of claim 1 wherein:
(c.1) said multiplier means is part of an all-analog feedback loop, where the loop includes said first output node.
9. The mapping circuit of claim 1 wherein:
(c.1) said multiplier means is an attenuating multiplier means rather than an amplifying multiplier means.
10. The mapping circuit of claim 1 and further comprising:
(d) a coefficient set selecting means for selecting among two or more sets of predetermined coefficients in response to one or more predefined switching events, where the currently selected set of predetermined coefficients currently defines the nonlinear mapping.
11. The mapping circuit of claim 10 wherein:
(d.1) said one or more predefined switching events include at least one of a predefined temperature change indication and an indication of a crossing by a predefined signal over of a predefined boundary-crossing condition.
12. The mapping circuit of claim 10 wherein the predefined signal is the first input signal.
13. The mapping circuit of claim 10 wherein:
(d.1) at least one of said sets of predetermined coefficients causes the mapping circuit to provide a substantially linear mapping between a first subset of input values represented by the first input signal and a corresponding first subset of output values represented by the first output signal.
14. The mapping circuit of claim 1 wherein:
said nonlinear mapping provides sensor nonlinearity compensation for a specific sensor, the nonlinear mapping having been defined in response to observed behavior of the specific sensor within a predefined domain of a physical attribute sensed by said sensor.
15. The mapping circuit of claim 1 wherein:
said nonlinear mapping provides nonlinearity compensation for a specific sensor and for one or more specific downstream components that are coupled downstream of the specific sensor to output a sensing signal representative of a physical attribute measured by the sensor, the nonlinear mapping having been defined in response to observed behavior of the specific sensor and the one or more specific downstream components within a predefined domain of the physical attribute sensed by said sensor.
16. The mapping circuit of claim 1 and further comprising:
(d) a simultaneous function definition and calibration means for simultaneously defining said nonlinear mapping between the input values and the output values and fixing at least one absolute value of the first output signal in response to a supplied reference setting of the first input signal.
17. The mapping circuit of claim 16 wherein:
(d.1) said simultaneous function definition and calibration means provides for a fixing of at least three absolute values of the first output signal in response to a supplied three or more reference settings of the first input signal.
18. The mapping circuit of claim 16 wherein:
(d.1) said simultaneous function definition and calibration provides offset and gain compensation for a corresponding generator of the first input signal where the generator is subject to having a unique offset and a unique gain.
19. The mapping circuit of claim 1 wherein:
(c.1) said multiplier means includes first and second input terminals for receiving respective first and second multiplicand signals and an output terminal for outputting a corresponding product signal, where at least one of said first and second input terminals receives a sum signal representing a sum of at least an output feedback signal and an input feed-forward signal.
20. The mapping circuit of claim 19 wherein:
(c.2) said sum represented by the sum signal further has a variable gain factor added therein.
21. The mapping circuit mapping circuit of claim 1 wherein:
(b.1) said first output node is coupled to the first input node by way of an all analog pathway.
22. The mapping circuit mapping circuit of claim 1 and further comprising:
(d) an analog to digital converter coupled to the first input node for providing said variable first input signal as a digital signal that is derived from an analog counterpart signal.
23. The mapping circuit mapping circuit of claim 1 wherein said successive ones of output values represented by the first output signal are part of a span of the nonlinear mapping that does not include a discontinuity of slope inside the span.