IP Library Granted Patent US 7,998,879
Granted Patent B2
US 7,998,879 · App. 11/723,236 · Granted Aug 16, 2011

Insulation structure for high temperature conditions and manufacturing method thereof

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Quick Facts
Patent No.
US 7,998,879
App. No.
11/723,236
Granted
Aug 16, 2011
Kind
B2
Abstract

An insulation structure for high temperature conditions and a manufacturing method thereof. In the insulation structure, a substrate has a conductive pattern formed on at least one surface thereof for electrical connection of a device. A metal oxide layer pattern is formed on a predetermined portion of the conductive pattern by anodization, the metal oxide layer pattern made of one selected from a group consisting of Al, Ti and Mg.

Claims (11)

1. A method for manufacturing an insulation structure for high temperature conditions comprising:

preparing a substrate having a conductive pattern formed on at least one surface thereof for electrical connection of a device;

depositing a metal selected from a group consisting of Al, Ti and Mg on the substrate with the conductive pattern formed thereon by PVD to form a metal deposition layer;

oxidizing the metal deposition layer by anodization to form a metal oxide layer;

applying a photosensitive film to the metal oxide layer, and exposing and developing the photosensitive film to form a plurality of photosensitive film patterns and exposing the metal oxide layer between the plurality of the photosensitive film patterns; and

removing the metal oxide layer exposed between the plurality of the photosensitive film patterns by etching a surface of the substrate using the photosensitive film pattern as a mask, wherein

a metal oxide layer pattern is formed on the entirety of, or in part of, the conductive pattern, such that an electrical device may be disposed on a portion in which the conductive pattern is partially exposed.

2. The method according to claim 1 , wherein the PVD is sputtering or evaporation.

3. The method according to claim 1 , further comprising attaching an upper substrate onto the metal oxide layer pattern.

4. The method according to claim 3 , wherein the upper substrate and the metal oxide layer pattern are bonded together by Au/Sn eutectic bonding.

5. The method according to claim 3 , wherein the device comprises a light emitting diode, and the upper substrate comprises a reflecting plate.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2014
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 031933/0211 →
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.; SAMSUNG LED CO., LTD.
Reel/Frame 024728/0467 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2007
From: LEE, YOUNG KI; CHOI, SEOG MOON; SHIN, SANG HYUN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 019289/0640 →