IP Library Granted Patent US 7,826,238
Granted Patent B2
US 7,826,238 · App. 11/735,893 · Granted Nov 2, 2010

Power system inhibit method and device and structure therefor

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Quick Facts
Patent No.
US 7,826,238
App. No.
11/735,893
Granted
Nov 2, 2010
Kind
B2
Abstract

A power control system ( 25 ) uses two separate currents to control a startup operation of the power control system ( 25 ). The two currents are shunted to ground to inhibit operation of the power control system ( 25 ) and one of the two currents is disabled to minimize power dissipation. The two independently controlled currents are generated by a multiple output current high voltage device ( 12 ) responsively to two separate control signals ( 23,24 ).

Claims (5)

1. A power control system inhibition method comprising:

generating a first output current at an output of a system controller responsively to a first value of an output voltage; and

coupling the output to a voltage return to inhibit generation of the first output current and generating a second output current at the output while the output is coupled to the voltage return responsively to a second value of the output voltage that is less than the first value wherein the second output current is less than the first output current.

2. The method of claim 1 wherein generating the second output current includes generating both the first output current and the second output current when the output voltage is greater than the first value, and disabling generating the first output current and the second output current when the output voltage is at least equal to a third value wherein the first value is greater than the second value, and the third value is greater than both the first value and the second value.

3. The power control system inhibition method of claim 1 further including receiving an input voltage on an input of the system controller, generating the first output current, charging a capacitor coupled to the output with the first output current, and disabling the first output current when the output voltage is a second value that is greater than the first value.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2016
From: HALAMIK, JOSEF; HALL, JEFFERSON W.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 038392/0509 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: JPMORGAN CHASE BANK, N.A.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033686/0092 →