Encapsulated electronic device
View Patent ↗In one embodiment, an electronic device package ( 1 ) includes a leadframe ( 2 ) with a flag ( 3 ). An electronic chip ( 8 ) is attached to the flag ( 3 ) with a die attach layer ( 9 ). A trench ( 16 ) having curved sidewalls is formed in the flag ( 3 ) in proximity to the electronic chip ( 8 ) and surrounds the periphery of the chip ( 8 ). An encapsulating layer ( 19 ) covers the chip ( 8 ), portions of the flag ( 3 ), and at least a portion of the curved trench ( 16 ). The curved trench ( 16 ) reduces the spread of die attach material across the flag ( 3 ) during chip attachment, which reduces chip and package cracking problems, and improves the adhesion of encapsulating layer ( 19 ). The shape of the curved trench ( 16 ) prevents flow of die attach material into the curved trench ( 16 ), which allows the encapsulating layer ( 19 ) to adhere to the surface of the curved trench ( 16 ).
1. An electronic device package comprising:
a support substrate including a flag, wherein the flag has a bonding surface;
a first electronic chip having a first peripheral edge, wherein the first electronic chip is attached to a first portion of the bonding surface with a first die attach material;
a first continuous trench for restricting flow of the first die attach material on the bonding surface, wherein the first continuous trench is formed in the flag in proximity to the first peripheral edge, and wherein the first continuous trench extends only partially into the flag, and wherein the first continuous trench includes a continuously rounded cross-sectional shape and a curved sidewall surface, and wherein the first continuous trench surrounds the first electronic chip, and wherein the first die attach material terminates at approximately an inner edge of the first continuous trench; and
a shaped trench formed in the flag, wherein the first electronic chip overlies at least a portion of the shaped trench.
2. The device of claim 1 , wherein the first continuous trench has a width between about one hundred two microns and about three hundred thirty microns.
3. The device of claim 1 , further comprising an encapsulant covering the first electronic chip and at least a portion of the curved sidewall surface.
4. The device of claim 1 , wherein the shaped trench comprises a cross shape.
5. The device of claim 1 wherein the shaped trench is connected to the first continuous trench.