IP Library Granted Patent US 7,808,059
Granted Patent B2
US 7,808,059 · App. 11/797,292 · Granted Oct 5, 2010

Semiconductor substrate, and semiconductor device and method of manufacturing the semiconductor device

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Quick Facts
Patent No.
US 7,808,059
App. No.
11/797,292
Granted
Oct 5, 2010
Kind
B2
Abstract

In a semiconductor substrate 1 , a plurality of semiconductor elements 2 having diaphragm structures are formed in the form of cells in the longitudinal direction and the lateral direction, and V-grooves 3 are formed by anisotropic etching continuously on only division lines 4 parallel formed in one direction, out of the division lines 4 which are orthogonal to each other and divide the respective semiconductor elements 2 individually.

Claims (16)

1. A semiconductor substrate comprising:

a plurality of semiconductor elements each comprising a MEMS device, and each including a thinned portion of the semiconductor substrate;

first direction division lines;

second direction division lines intersecting the first direction division lines;

a groove formed on each first direction division line; and

a modified region formed along each of the first direction division lines and second direction division lines,

wherein each semiconductor element is surrounded by first direction division lines and second direction division lines and the grooves do not intersect each other.

2. The semiconductor substrate according to claim 1 , wherein the thinned portion is a diaphragm structure of a MEMS device.

3. The semiconductor substrate according to claim 1 , wherein the grooves are a V-shaped grooves.

4. The semiconductor substrate according to claim 1 , wherein the grooves are formed only on the first direction division lines.

5. The semiconductor substrate according to claim 1 , wherein the grooves are formed by etching, and the modified region is laser-formed.

6. The semiconductor substrate according to claim 1 , wherein the semiconductor substrate is a silicon substrate.

7. The semiconductor substrate according to claim 1 , wherein the grooves are U-shaped grooves.

8. The semiconductor substrate according to claim 1 , wherein the grooves are made by anisotropic etching.

9. The semiconductor substrate according to claim 1 , wherein the MEMS devices are MEMS pressure sensors.

10. The semiconductor substrate according to claim 1 , wherein the MEMS devices are MEMS acceleration sensors.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2025
From: TDK CORPORATION
To: INVENSENSE, INC.
Reel/Frame 073080/0824 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2017
From: EPCOS AG
To: TDK CORPORATION
Reel/Frame 041265/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2013
From: PANASONIC CORPORATION
To: EPCOS AG
Reel/Frame 031138/0412 →
CHANGE OF NAME Recorded Nov 20, 2008
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 021897/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KUMAKAWA, TAKAHIRO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 019712/0527 →