IP Library Granted Patent US 7,582,527
Granted Patent B2
US 7,582,527 · App. 11/822,176 · Granted Sep 1, 2009

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 7,582,527
App. No.
11/822,176
Granted
Sep 1, 2009
Kind
B2
Abstract

Method for fabricating a semiconductor device, including the steps of providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon, forming a first insulating film, second conductive type polysilicon, and a second insulating film in succession on the semiconductor substrate, selectively removing the first insulating film, the polysilicon, and the second insulating film, to form a floating gate pattern at the cell region, elevating a temperature initially in a state O 2 gas is injected, maintaining a fix temperature, and dropping the temperature in a state N 2 gas is injected, to form a gate oxide film on a surface of the semiconductor substrate at the logic region, and forming a gate electrode pattern at each of the cell region and the logic region, whereby preventing a threshold voltage of a semiconductor device from dropping due to infiltration of impurities from doped polysilicon at the cell region to the active channel region.

Claims (40)

1. A method for fabricating a semiconductor device, comprising the steps of:

providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon;

forming a first insulating film, a second conductive type polysilicon, and a second insulating film in succession on the semiconductor substrate;

selectively removing the first insulating film, the polysilicon, and the second insulating film, to form a floating gate pattern at the cell region;

forming a first gate oxide film on the semiconductor substrate at the logic region;

etching and removing the first gate oxide film;

forming a second gate oxide film on the semiconductor substrate at the logic region; and

forming a gate electrode pattern at each of the cell region and the logic region.

2. The method of fabricating a semiconductor device according to in claim 1 , wherein the first insulating film is an ONO layer having an oxide film having a thickness of 15˜25 Å, a nitride film having a thickness of 90˜110 Å, and an oxide film having a thickness of 30˜50 Å.

3. The method of fabricating a semiconductor device according to claim 1 , wherein the polysilicon is doped with second conductive type impurities and formed to a thickness in a range of 2000˜3000 Å.

4. The method of fabricating a semiconductor device according to claim 1 , wherein the second insulting film is a bi-layered film having TEOS (Tetra-ethoxysilane) deposited to a thickness of 100˜200 Å, and a nitride film deposited to a thickness of 1200˜1800 Å.

5. The method of fabricating a semiconductor device according to claim 1 , wherein the first gate oxide film is formed to a thickness of 100˜150 Å.

6. The method of fabricating a semiconductor device according to claim 1 , wherein the first gate oxide film is removed by wet etching with HF.

7. The method of fabricating a semiconductor device according to claim 1 , wherein impurities present at the semiconductor substrate are removed at the same time with the removal of the first gate oxide film.

8. A method for fabricating a semiconductor device, comprising the steps of:

providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon;

forming a first insulating film a second conductive type polysilicon, and a second insulating film in succession on the semiconductor substrate;

selectively removing the second insulating film, and the polysilicon, to form a floating gate pattern at the cell region;

forming a sidewall oxide film on sidewalls of the floating gate pattern;

selectively removing the first insulating film by using the second insulating film as a mask after forming the sidewall oxide film;

forming a gate oxide film on the semiconductor substrate at the logic region; and

forming a gate electrode pattern at each of the cell region and the logic region.

9. The method of fabricating a semiconductor device according to claim 8 , wherein the first insulating film is an ONO layer having an oxide film having a thickness of 15˜25 Å, a nitride film having a thickness of 90˜110 Å, and an oxide film having a thickness of 30˜50 Å.

10. The method of fabricating a semiconductor device according to claim 8 , wherein the polysilicon is doped with second conductive type impurities and formed to a thickness in a range of 2000˜3000 Å.

11. The method of fabricating a semiconductor device according to claim 8 , wherein the second insulating film is a bi-layered film having TEOS (Tetra-ethoxysilane) deposited to a thickness of 100˜200 Å, and a nitride film deposited to a thickness of 1200˜1300 Å.

12. The method of fabricating a semiconductor device according to claim 8 , wherein the sidewall oxide film is formed to a thickness of 80˜120 Å.

13. The method of fabricating a semiconductor device according to claim 8 , wherein the gate oxide film is formed to a thickness of 100˜150 Å.

14. A method for fabricating a semiconductor device, comprising the steps of:

providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon;

forming a first insulating film, and a polysilicon in succession on the semiconductor substrate;

injecting second conductive type impurity ions into the polysilicon, and forming a second insulating film on the polysilicon;

selectively removing the first insulating film, the polysilicon, and the second insulating film, to form a floating gate pattern at the cell region;

forming a gate oxide film on a surface of the semiconductor substrate at the logic region; and

forming a gate electrode pattern at each of the cell region and the logic region.

15. The method of fabricating a semiconductor device according to claim 14 , further comprising the step of performing heat treatment after the injection of second conductive type impurity ions into the polysilicon.

16. The method of fabricating a semiconductor device according to claim 15 , wherein the heat treatment is performed at a temperature in a range of 800˜1000° C. for 10˜30 minutes.

17. The method of fabricating a semiconductor device according to claim 14 , wherein the step of injecting second conductive type impurity ions into the polysilicon includes the step of injecting second conductive type impurity ions into the polysilicon at a dose in a range of 1e 15 ˜10e 15 ions/cm 2 , with an ion injection energy in a range of 40˜50 keV.

18. The method of fabricating a semiconductor device according to claim 14 , wherein the first insulating film is an ONO layer having an oxide film having a thickness of 15˜25 Å, a nitride film having a thickness of 90˜110 Å, and an oxide film having a thickness of 30˜50 Å.

19. The method of fabricating a semiconductor device according to claim 14 , wherein the second insulating film is a bi-layered film having TEOS (Tetra-ethoxysilane) deposited to a thickness of 100˜200 Å, and a nitride film deposited to a thickness of 1200˜1800 Å.

20. The method of fabricating a semiconductor device according to claim 14 , wherein the gate oxide film is formed to a thickness of 100˜150 Å.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2020
From: COLUMBA TECHNOLOGIES, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 052845/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2019
From: DB HITEK CO., LTD.
To: COLUMBA TECHNOLOGIES INC.
Reel/Frame 049709/0857 →
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →