Semiconductor wafer and method of testing the same
View Patent ↗The present invention provides a semiconductor wafer characterized by including: a silicon substrate which includes chip regions and scribe regions; multiple-layered films formed on the silicon substrate; and a reference mark formed in at least one film constituting the multiple-layered films. In addition, the semiconductor wafer is also characterized in that the reference mark is located at least one of the vertices of a virtual rectangle covering the plurality of chip regions, and in that the reference mark is longer than one side of each of the chip regions.
1. A semiconductor wafer comprising:
a semiconductor substrate including chip regions and a scribe region;
stacked films formed on the semiconductor substrate; and
a plurality of reference marks formed in at least one of the films of the stacked films and located in the scribe region,
wherein
the reference marks are arranged in a first direction in planar view,
a length of each of the reference marks in the first direction is longer than one side of the chip region in the first direction in planar view,
the reference marks include a first reference mark and a second reference mark that is next to the first reference mark in the first direction in planar view,
the first reference mark is spaced from the second reference mark by a length that is longer than the one side of the chip region in the first direction in planar view, and
there is no additional reference mark between the first reference mark and the second reference mark.
2. The semiconductor wafer according to claim 1 , wherein each of the reference marks is arranged in the scribe region.
3. The semiconductor wafer according to claim 1 , wherein each of the reference marks has such a film thickness that a contrast between the reference mark and its neighbor is generated when the reference mark is irradiated with light with a wavelength of 250 nm to 2400 nm.
4. The semiconductor wafer according to claim 3 , wherein the film thickness is not less than 100 nm.
5. The semiconductor wafer according to claim 1 , wherein each of the reference marks is formed by a metal layer constituting the stacked films.
6. The semiconductor wafer according to claim 1 , wherein a planar shape of each of the reference marks is any one of L-shape, T-shape, and cross-shape.
7. The semiconductor wafer according to claim 1 , wherein each of the reference marks includes a plurality of conductive plugs.
8. The semiconductor wafer according to claim 1 , wherein
the stacked films include an interlayer insulating film and transparent films formed on the interlayer insulating film, and
the reference marks are formed in the interlayer insulating film.
9. The semiconductor wafer according to claim 1 , wherein
an uppermost film of the stacked films is a polyimide protection film, and
the reference marks are formed on the polyimide protection film.
10. The semiconductor wafer according to claim 1 , wherein each of the reference marks includes a plurality of metal interconnects.