Method of manufacturing self-aligned contact openings
View Patent ↗A method of manufacturing self-aligned contact openings is provided. A substrate having a number of device structures is provided and the top of the device structures is higher than the surface of the substrate. A first dielectric layer and a conductive layer are sequentially formed on the surfaces of the substrate and the device structures. Next, a part of the conductive layers on the top and the sidewalls of the device structures is removed and a number of first spacers is formed on the exposed sidewalls of the device structures. The exposed conductive layer and the first dielectric layer are removed by using the first spacer as the mask to expose the substrate. Then, a number of conductive spacers is formed. A number of second spacers is formed on the sidewalls of the conductive spacers.
1. A method of manufacturing self-aligned contact openings, comprising:
providing a substrate having a plurality of device structures, wherein the top of the device structures is higher than the surface of the substrate;
sequentially forming a first dielectric layer and a conductive layer on the surfaces of the substrate and the device structures;
forming a mask layer on the conductive layer between two adjacent device structures;
removing a part of the conductive layer on the top and the sidewalls of the device structures not covered by the mask layer;
forming a plurality of first spacers on the sidewalls of the device structures;
removing the conductive layer and the first dielectric layer by using the first spacer as the mask to expose the substrate and to form a plurality of conductive spacers; and
forming a plurality of second spacers on the sidewalls of the conductive spacers.
2. The method according to claim 1 , wherein the step of removing a part of the conductive layer on the top and the sidewalls of the device structures comprises performing a non-isotropic etching process.
3. The method according to claim 1 , wherein the process of removing the conductive layer and the first dielectric layer comprises performing a non-isotropic etching process.
4. The method according to claim 1 , wherein the conductive layer comprises a multiple conductive layer.
5. The method according to claim 4 , wherein the multiple conductive layer comprises a polysilicon layer and a metal silicide layer on the polysilicon layer.
6. The method according to claim 5 , wherein the material of the metal silicide layer comprises tungsten silicide.
7. The method according to claim 1 , wherein the device structures are trench devices.
8. The method according to claim 1 , wherein the material of the first spacers comprises silicon nitride.
9. The method according to claim 1 , wherein the material of the first dielectric layer comprises silicon oxide or silicon oxide/silicon nitride/silicon oxide.
10. The method according to claim 1 , further comprising forming a second dielectric layer on the substrate after the second spacers are formed.
11. The method according to claim 10 , further comprising performing an etching process after the second dielectric layer is formed and forming a plurality of contact openings in the second dielectric layer, wherein, the contact openings are disposed between two adjacent device structures to expose the substrate, the first spacers and the second spacers.
12. The method according to claim 1 , wherein the mask layer is a patterned photoresist layer.
13. The method according to claim 1 , further comprising removing the mask layer before the first spacers are formed.