IP Library Granted Patent US 7,498,800
Granted Patent B1
US 7,498,800 · App. 11/880,093 · Granted Mar 3, 2009

Methods and apparatus for rotationally accessed tester interface

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Quick Facts
Patent No.
US 7,498,800
App. No.
11/880,093
Granted
Mar 3, 2009
Kind
B1
Abstract

A wafer/wafer translator pair in the attached state, with the wafer translator extending beyond the outer circumference of the wafer, is disposed on a rotation stage. At least one surface of the edge-extended wafer translator, in a peripheral annular region, provides contact pads electrically coupled to corresponding pads on the wafer, and a caliper-style contact block, operable to move perpendicularly the edge-extended wafer translator is positioned such the contact pads of the annular region may be electrically engaged with the contact block. After electrical communication between the wafer and the contact block, the contact block moves to a disengagement position, the rotation stage rotates the wafer/wafer translator pair to a new position and the contact block may then move into engagement with different contact pads in the annular region.

Claims (34)

1. A rotationally accessed tester interface, comprising:

a rotation stage;

an edge-extended wafer translator, having a first and a second major surface, disposed on the rotation stage; and

a first contact block having a first portion positioned to overlap a peripheral annular region on a first major surface of the edge-extended wafer translator, and moveable, independent of the edge-extended wafer translator, in an axis perpendicular to the first major surface;

wherein the edge-extended wafer translator includes contact pads disposed in a peripheral annular region of at least the first surface;

wherein the first contact block includes a zero insertion force socket operable to receive pins extending perpendicularly from the first major surface of the edge-extended wafer translator.

2. The rotationally accessed tester interface of claim 1 , wherein the edge-extended wafer translator is planar.

3. The rotationally accessed tester interface of claim 1 , wherein the edge-extended wafer translator is non-planar in the peripheral annular region thereof.

4. The rotationally accessed tester interface of claim 1 , wherein the first contact block includes pins extending outwardly from the first portion thereof toward the first major surface of the edge-extended wafer translator.

5. The rotationally accessed tester interface of claim 1 , wherein the first contact block includes a second portion positioned to overlap a peripheral annular region on a second major surface of the edge-extended wafer translator, and operable to move in an axis perpendicular to the second major surface; wherein the first contact block further comprises pins extending outwardly from the second portion thereof toward the second major surface of the edge-extended wafer translator; and wherein the edge-extended wafer translator includes contact pads disposed in the peripheral annular region of the second major surface.

6. The rotationally accessed tester interface of claim 1 , wherein the first contact block is coupled to one or more cables for electrical communication with at least one test apparatus.

7. The rotationally accessed tester interface of claim 1 , further includes a second contact block having a first portion positioned to overlap the peripheral annular region on the first major surface of the edge-extended wafer translator, and operable to move in an axis perpendicular to the first major surface.

8. A method of electrically accessing one or more integrated circuits on a wafer, comprising:

providing an edge-extended wafer translator, the edge-extended wafer translator having a first major surface and a second major surface;

removably attaching the wafer to the first major surface of the edge-extended wafer translator, thereby forming a wafer/wafer translator pair, wherein the edge-extended wafer translator provides electrical pathways from the integrated circuits on the wafer to contact terminals on a peripheral annular region of the edge-extended wafer translator;

providing a stage upon which the wafer/wafer translator pair is disposed; and

moving a first contact block toward the edge-extended wafer translator in an axis perpendicular to the first major surface of the edge-extended wafer translator such that an electrical connection is established between the first contact block and the contact terminals on the peripheral annular region of the edge-extended wafer translator;

wherein the first contact block includes a zero insertion force socket operable to receive pins extending perpendicularly from the first major surface of the edge-extended wafer translator.

9. The method of claim 8 , further comprising:

moving the first contact block away from the edge-extended wafer translator in the axis perpendicular to the first major surface of the edge-extended wafer translator; and

rotating the wafer/wafer translator pair.

10. The method of claim 8 , further comprising:

moving the first contact block away from the edge-extended wafer translator in the axis perpendicular to the first major surface of the edge-extended wafer translator; and

moving the first contact block in a path corresponding to the periphery of the edge-extended wafer translator.

11. The method of claim 10 , wherein the path is substantially circular.

12. A rotationally accessed tester interface, comprising:

a rotation stage;

an edge-extended wafer translator, having a first and a second major surface, disposed on the rotation stage; and

a first contact block having a first portion positioned to overlap a peripheral annular region on a first major surface of the edge-extended wafer translator, and moveable, independent of the edge-extended wafer translator, in an axis perpendicular to the first major surface;

wherein the edge-extended wafer translator includes contact pads disposed in a peripheral annular region of at least the first surface;

wherein the first contact block includes a low insertion force socket operable to receive pins extending perpendicularly from the first major surface of the edge-extended wafer translator.

13. The rotationally accessed tester interface of claim 12 , wherein the edge-extended wafer translator is planar.

14. The rotationally accessed tester interface of claim 12 , wherein the first contact block includes pins extending outwardly from the first portion thereof toward the first major surface of the edge-extended wafer translator.

15. The rotationally accessed tester interface of claim 12 , wherein the first contact block is coupled to one or more cables for electrical communication with at least one test apparatus.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Apr 7, 2021
From: PENINSULA MASTER FUND, LTD.; PENINSULA TECHNOLOGY FUND, LP; QVT FUND LP; QUINTESSENCE FUND LP
To: ADVANCED INQUIRY SYSTEMS, INC.
Reel/Frame 055849/0609 →
CHANGE OF NAME Recorded Mar 13, 2015
From: ADVANCED INQUIRY SYSTEMS, INC.
To: TRANSLARITY, INC.
Reel/Frame 035203/0773 →
SECURITY INTEREST Recorded Sep 21, 2009
From: ADVANCED INQUIRY SYSTEMS, INC.
To: PENINSULA MASTER FUND, LTD.; PENINSULA TECHNOLOGY FUND, LP; QVT FUND LP; QUINTESSENCE FUND LP
Reel/Frame 023282/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2009
From: WHITEMAN, KENNETH S.
To: ADVANCED INQUIRY SYSTEMS, INC.
Reel/Frame 022146/0616 →