Patent Assignment
Reel/Frame 023282/0070
Security Interest
Recorded: 2009-09-21
Received: 2009-09-24
Pages: 12
Assignor
ADVANCED INQUIRY SYSTEMS, INC.
Executed: 2009-09-11
Assignees
PENINSULA MASTER FUND, LTD.
235 PINE STREET, SUITE 1600, 235 PINE STREET, SUITE 1600, SAN FRANCISCO, CA, 94104, UNITED STATES
PENINSULA TECHNOLOGY FUND, LP
235 PINE STREET, SUITE 1600, SAN FRANCISCO, CA, 94104, UNITED STATES
QVT FUND LP
1177 AVENUE OF THE AMERICAS, 9TH FLOOR, NEW YORK, NY, 10036, UNITED STATES
QUINTESSENCE FUND LP
1177 AVENUE OF THE AMERICAS, 9TH FLOOR, NEW YORK, NY, 10036, UNITED STATES
Covered Properties
(100)
Maintaining a Wafer/Wafer Translator Pair in an Attached State Free of a Gasket Disposed Therebetween
Application:
12/547,418 →
Methods and Apparatus for Collecting Process Characterization Data After First Failure in a Group of Tested Devices
Application:
12/427,748 →
Wafer Prober Integrated With Full-Wafer Contacter
Application:
12/404,277 →
Retractable Protection Mechanism For Electrical Connection Pins
Application:
61/143,355 →
Method and Apparatus for Single-Sided Extension of Electrical Conductors Beyond the Edges of a Substrate
Application:
12/347,995 →
Methods and Apparatus for Planar Extension of Electrical Conductors Beyond the Edges of a Substrate
Application:
12/325,269 →
Method of testing thinned and singulated die at the wafer level
Application:
61/113,507 →
Method of adding one or more layers of conductive traces and pads to the surface of a fully manufactured wafer including connection to all or a selected sub set of the pads on the die within the wafer
Application:
61/113,544 →
Chemical Removal of Oxide Layer from Chip Pads
Application:
12/284,618 →
Fiber-Based Optical Alignment System
Application:
12/154,684 →
Fully Tested Wafers Having Bond Pads Undamaged by Probing and Applications Thereof
Application:
12/079,159 →
Wafer Translator Having Metallization Pattern Providing High Density Interdigitated Contact Pads for Component
Application:
12/079,202 →
Wafer Translator Having a Silicon Core Isolated from Signal Paths by a Ground Plane
Application:
12/077,670 →
Wafer prober integrated with full-wafer contacter
Application:
61/069,457 →
Wafer translator having a silicon core fabricated with printed circuit board manufacturing techniques
Application:
12/074,904 →
Configurable Demodulator and Demodulation Method
Application:
12/028,292 →
Digital Data Encoding and Decoding Method and System
Application:
12/027,703 →
Multi-Format All-Digital Modulator and Method
Application:
12/027,692 →
Thick Metal Interconnect with Metal Pad Caps at Selective Sites and Process for Making the Same
Application:
12/012,121 →
Thick Metal Interconnect with Metal Pad Caps at Selective Sites and Process for Making the Same
Application:
12/012,120 →
High Temperature Range Electrical Circuit Testing
Application:
11/871,716 →
Chemical removal of oxide layer from chip pads
Application:
60/994,946 →
Methods for Access to a Plurality of Unsingulated Integrated Circuits of a Wafer Using Single-Sided Edge-Extended Wafer Translator
Application:
11/881,574 →
Methods and Apparatus for Rotationally Accessed Tester Interface
Application:
11/880,093 →
Methods and Apparatus for Flexible Extension of Electrical Conductors Beyond the Edges of a Substrate
Application:
11/879,736 →
Apparatus for Providing Electrical Access to One or More Pads of the Wafer Using a Wafer Translator and a Gasket.
Application:
11/825,567 →
Apparatus for Fixed-Form Multi-Planar Extension of Electrical Conductors Beyond the Margins of a Substrate
Application:
11/811,874 →
Laser isolation of metal over alumina underlayer and structures formed thereby
Application:
11/811,880 →
Apparatus for Full-Wafer Test and Burn-in Mechanism
Application:
11/810,950 →
Apparatus for Translated Wafer Stand-in Tester
Application:
11/810,951 →
Methods for Multi-Modal Wafer Testing Using Edge-Extended Wafer Translator
Application:
11/810,237 →
Fiber-Based Optical Alignment System
Application:
11/799,550 →
Desktop wafer analysis station
Application:
11/729,039 →
Fully tested wafers having bond pads undamaged by probing and applications thereof
Application:
60/919,521 →
Pade' Approximant Based Compensation for Integrated Sensor Modules and the Like
Application:
11/700,475 →
Current Protection Circuit Using Multiple Sequenced Bipolar Transistors
Application:
11/567,688 →
Multi-Pad Shared Current Dissipation with Heterogenic Current Protection Structures
Application:
11/532,478 →
Single Well Excess Current Dissipation Circuit
Application:
11/532,477 →
Method and apparatus for monolithic wafer stand-in tester
Application:
60/836,488 →
Method and apparatus for single sided extension of electrical conductors beyond the edges of a substrate
Application:
60/834,063 →
Sensor Calibration Using Selectively Disconnected Temperature
Application:
11/460,951 →
Laser isolation of metal over alumina underlayer and structures formed thereby
Application:
60/812,152 →
Method and apparatus for single wafer stand-in tester
Application:
60/811,673 →
Desktop wafer analysis station
Application:
60/786,928 →
Initial Decision-Point Circuit Operation Mode
Application:
11/371,661 →
Current Sense Circuit
Application:
11/356,557 →
Methods and Apparatus for Addition of Electrical Conductors to Previously Fabricated Device
Application:
11/339,102 →
Method and System for Active Noise Cancellation
Application:
11/173,355 →
Differential Signal Driver Having Complimentary and Current-Aided Pre-Emphasis
Application:
11/157,403 →
Low Power Sigma Delta Modulator
Application:
11/132,705 →
Providing Nonlinear Temperature Compensation for Sensing Means by Use of Pade Approximant Function Emulators
Application:
11/123,964 →
Closed Loop Direct Current to Direct Current Converter That Does Not Require Voltage Reference
Application:
11/119,452 →
High Reliability Electrically Erasable and Programmable Read-Only Memory (Eeprom)
Application:
11/098,940 →
Track and Hold Circuit with Operating Point Sensitive Current Mode Based Offset Compensation
Application:
11/094,945 →
Method and System for Protecting Content in a Programmable System
Application:
11/091,746 →
Method and System for Reducing Audible Side Effects of Dynamic Current Consumption
Application:
11/091,743 →
Method and System for Data Logging in a Listening Device
Application:
11/091,747 →
Double-Sided Extended Drain Field Effect Transistor
Application:
11/010,892 →
Radio Frequency Envelope Detector
Application:
10/977,295 →
Antenna integrated with retrieval component of hearing aid
Application:
10/975,914 →
Dynamic Phase Alignment of a Clock and Data Signal Using an Adjustable Clock Delay Line
Application:
10/933,742 →
Ambient Light Suppression Circuit for Photodiode Receiver Applications
Application:
10/925,263 →
High Voltage, Low-Offset Operational Amplifier with Rail-to-Rail Common Mode Input Range in a Digital Cmos Process
Application:
10/919,757 →
Low-Voltage Differential Signal (Lvds) Transmitter with High Signal Integrity
Application:
10/920,009 →
Optical Tracking Sensor Method
Application:
10/903,790 →
Methods for Manufacturing a Soft Error and Defect Resistant Pre-Metal Dielectric Layer
Application:
10/877,482 →
Structured Asic Device with Configurable Die Size and Selectable Embedded Functions
Application:
10/860,894 →
Pade' Approximant Based Compensation for Integrated Sensor Modules and the Like
Application:
10/845,681 →
Method and System for Acoustic Shock Protection
Application:
10/815,891 →
Full Wafer Contacter and Applications Thereof
Application:
10/789,305 →
Temperature Stable Voltage Reference Circuit Using a Metal-Silicon Schottky Diode for Low Voltage Circuit Applications
Application:
10/770,233 →
High resolution, high sensitivity image scanner having noise cancellation improvements
Application:
10/697,854 →
Method and System for Processing Subband Signals Using Adaptive Filters
Application:
10/642,847 →
Amplifier
Application:
10/640,922 →
Digitally Controlled Impedance Driver Matching for Wide Voltage Swings at Input/Output Node and Having Programmable Step Size
Application:
10/637,840 →
Method and Apparatus for Wafer Scale Testing
Application:
10/633,011 →
Dual Differential-Input Amplifier Having Wide Input Range
Application:
10/615,440 →
Double-Sided Extended Drain Field Effect Transistor, and Integrated Overvoltage and Reverse Voltage Protection Circuit That Uses the Same
Application:
10/611,714 →
Delay Locked Loop with Fixed Angle De-Skew, Quick Start and Low Jitter
Application:
10/602,195 →
Symmetric and Complementary Differential Amplifier
Application:
10/446,306 →
Bi-Directional Current Measurement Circuit That Uses a Transconductance Amplifier to Generate a Copy Current
Application:
10/442,618 →
Multi-Fault Protected High Side Switch with Current Sense
Application:
10/442,630 →
Direct Conversion Receiver with Direct Current Offset Correction Circuitry
Application:
10/430,656 →
Adaptive Diversity Receiver Architecture
Application:
10/430,455 →
Up-Conversion of a Down-Converted Baseband Signal in a Direct Conversion Architecture Without the Baseband Signal Passing Through Active Elements
Application:
10/426,225 →
Direct Conversion Receiver for Amplitude Modulated Signals Using Linear/Log Filtering
Application:
10/426,383 →
Distributed Memory and Logic Circuits
Application:
10/422,137 →
Static Random Access Memory (Sram) Without Precharge Circuitry
Application:
10/406,526 →
Switched Capacitor Voltage Reference Circuits Using Transconductance Circuit to Generate Reference Voltage
Application:
10/401,082 →
Stable Floating Gate Voltage Reference Using Interconnected Current-to-Voltage and Voltage-to-Current Converters
Application:
10/393,333 →
Differential nor Memory Cell Having Two Floating Gate Transistors
Application:
10/387,824 →
Stimulated Quick Start Oscillator
Application:
10/384,094 →
Low Voltage Enhanced Output Impedance Current Mirror
Application:
10/373,912 →
Methods for Sidewall Protection of Metal Interconnect for Unlanded Vias Using Physical Vapor Deposition
Application:
10/373,911 →
Methods and Apparatus for Addition of Electrical Conductors to Previously Fabricated Device
Application:
10/370,393 →
Use of Irregularly Shaped Conductive Filler Features to Improve Planarization of the Conductive Layer While Reducing Parasitic Capacitance Introduced by the Filler Features
Application:
10/348,093 →
Method and System for Real-Time Speech Recognition
Application:
10/277,454 →
Method and System for Real Time Audio Synthesis
Application:
10/277,598 →
Absolute Value Amplitude Baseband Detector
Application:
10/262,437 →
Integrated Overvoltage and Reverse Voltage Protection Circuit
Application:
10/243,749 →