IP Library Granted Patent US 8,247,893
Granted Patent B2
US 8,247,893 · App. 11/965,653 · Granted Aug 21, 2012

Mountable integrated circuit package system with intra-stack encapsulation

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Quick Facts
Patent No.
US 8,247,893
App. No.
11/965,653
Granted
Aug 21, 2012
Kind
B2
Abstract

A mountable integrated circuit package system comprising: mounting a first integrated circuit device over a package carrier; mounting an interposer including a central aperture over the package carrier, an intra-stack interconnect connected between the interposer and the package carrier, and the first integrated circuit device within the central aperture; and forming an intra-stack encapsulation over the package carrier and surrounding the interposer.

Claims (20)

1. A method for manufacturing a mountable integrated circuit package system comprising: mounting a first integrated circuit device over a package carrier; mounting an interposer having a top surface and a bottom surface including a central aperture over the package carrier, an intra-stack interconnect connected on the bottom surface between the interposer and the package carrier, and the first integrated circuit device disposed within the central aperture; and forming an intra-stack encapsulation partially filling the central aperture, surrounding and in direct contact with the first integrated circuit device, over the package carrier, and surrounding the interposer, with the intra-stack encapsulation exposing the top surface of the interposer for receiving an electrical connector.

2. The method as claimed in claim 1 further comprising mounting a top integrated circuit device over the interposer.

3. The method as claimed in claim 1 wherein forming the intra-stack encapsulation includes surrounding an outer perimeter of the interposer with the intra-stack encapsulation.

4. The method as claimed in claim 1 wherein forming the intra-stack encapsulation includes exposing a top device side of the first integrated circuit device.

5. The method as claimed in claim 1 further comprising mounting a passive device over a top interposer side of the interposer.

6. A method for manufacturing a mountable integrated circuit package system comprising: mounting a first integrated circuit device over a package carrier; mounting an interposer having a top surface and a bottom surface including a central aperture over the package carrier, an intra-stack interconnect connected on the bottom surface between the interposer and the package carrier, and the first integrated circuit device disposed within the central aperture; forming an intra-stack encapsulation partially filling the central aperture, over the package carrier, surrounding the interposer and in direct contact with the first integrated circuit device, with the top surface of the interposer exposed for receiving an electrical connector and mounting a top integrated circuit device over the interposer with a cavity between the top integrated circuit device and the intra-stack encapsulation, with the top integrated circuit device connected to the electrical connector.

7. The method as claimed in claim 6 further comprising applying an underfill between the first integrated circuit device and the package carrier.

8. The method as claimed in claim 6 further comprising connecting a first internal interconnect between the first integrated circuit device and the package carrier.

9. The method as claimed in claim 6 wherein forming the intra-stack encapsulation includes forming the intra-stack encapsulation between the first integrated circuit device and the package carrier.

10. The method as claimed in claim 6 wherein forming the intra-stack encapsulation includes forming the intra-stack encapsulation between the interposer and the package carrier.

11. A mountable integrated circuit package system comprising: a first integrated circuit device mounted over a package carrier; an interposer having a top surface and a bottom surface including a central aperture mounted over the package carrier, an intra-stack interconnect connected on the bottom surface between the interposer and the package carrier, and the first integrated circuit device disposed within the central aperture; and an intra-stack encapsulation partially filling the central aperture, surrounding and in direct contact with the first integrated circuit device, over the package carrier, and surrounding the interposer, with the intra-stack encapsulation exposing the top surface of the interposer for receiving an electrical connector.

12. The system as claimed in claim 11 further comprising a top integrated circuit device mounted over the interposer.

13. The system as claimed in claim 11 wherein the intra-stack encapsulation surrounds an outer perimeter of the interposer.

14. The system as claimed in claim 11 wherein the intra-stack encapsulation exposes a top device side of the first integrated circuit device.

15. The system as claimed in claim 11 further comprising a passive device mounted over a top interposer side of the interposer.

16. The system as claimed in claim 11 further comprising a top integrated circuit device over the interposer with a cavity between the ton integrated circuit device and the intra-stack encapsulation.

17. The system as claimed in claim 16 further comprising an underfill formed between the first integrated circuit device and the package carrier.

18. The system as claimed in claim 16 further comprising a first internal interconnect between the first integrated circuit device and the package carrier.

19. The system as claimed in claim 16 wherein the intra-stack encapsulation includes the intra-stack encapsulation formed between the first integrated circuit device and the package carrier.

20. The system as claimed in claim 16 wherein the intra-stack encapsulation includes the intra-stack encapsulation formed between the interposer and the package carrier.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038388 FRAME: 0036. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064834/0911 →
CORRECTIVE ASSIGNMENT TO CORRECT A TYPOGRAPHICAL ERROR ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 064789 FRAME: 0885. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 7, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064836/0363 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 38388 FRAME: 0036 Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 064789/0885 →