Semiconductor storage device and method of manufacturing the same
View Patent ↗A nonvolatile semiconductor storage device is provided in which memory cells comprising PN junction diodes having satisfactory rectifying characteristics are arranged in three dimensions. The semiconductor storage device includes: a first wire which extends in one direction; a second wire which extends in a direction intersecting the first wire; and a memory cell which is positioned at a portion of intersection of the first wire with the second wire between the first wire and the second wire, the memory cell comprising a storage element and a PN junction diode connected thereto, positioned on a side of the second wire used in selecting the memory cell, and a P-type semiconductor forming the PN junction diode forms a portion of the second wire, wherein a plurality of structures, each structure comprising the first wire, the second wire, and the memory cell is provided three-dimensionally.
1. A semiconductor storage device comprising:
a first wire which extends in one direction;
a second wire which extends in a direction intersecting the first wire;
an interlayer dielectric film formed between the second wire and the first wire; and
a memory cell which is positioned at a portion of intersection of the first wire with the second wire between the first wire and the second wire, the memory cell comprising a storage element which is formed in a contact hole in the interlayer dielectric film and includes an end which forms a part of a PN junction diode,
wherein the second wire is used in selecting the memory cell and includes a P-type semiconductor that is formed on the interlayer dielectric film and outside of the contact hole and forms a part of the PN junction diode, and
wherein a plurality of structures, each structure comprising the first wire, the second wire, and the memory cell, are provided three-dimensionally.
2. The semiconductor storage device as recited in claim 1 , wherein the second wire is a laminated structure of a conducting layer and a P-type semiconductor layer, the P-type semiconductor layer extending in the same direction in which the conducting layer extends, and the P-type semiconductor layer forms a part of the PN junction diode.
3. The semiconductor storage device as recited in claim 2 , wherein the
contact hole is provided at the portion of intersection in the interlayer dielectric film, and
wherein the storage element comprises an N-type semiconductor layer in contact with the P-type semiconductor layer of the second wire and formed in the contact hole, and the PN junction diode is formed by the P-type semiconductor layer and the N-type semiconductor layer.
4. The semiconductor storage device as recited in claim 1 , wherein the storage element is an element the resistance value of which is changed by an electrical signal.
5. The semiconductor storage device as recited in claim 4 , wherein the storage element has an insulating material the electrical resistance of which is changed by dielectric breakdown.
6. The semiconductor storage device as recited in claim 4 , wherein the storage element is a material which exhibits a colossal electro-resistance phenomenon.
7. The semiconductor storage device as recited in claim 6 , wherein the material exhibiting the colossal electro-resistance phenomenon is a perovskite metal oxide.
8. The semiconductor storage device as recited in claim 4 , wherein the storage element is a phase-change material which undergoes a phase change upon heating using a current.
9. The semiconductor storage device as recited in claim 4 , wherein the storage element is a tunnel magnetoresistance effect element.
10. The semiconductor storage device as recited in claim 1 , wherein the storage element is connected to the first wire.
11. The semiconductor storage device as recited in claim 1 , wherein the first wire is a bit line, and the second wire is a word line.
12. The semiconductor storage device as recited in claim 1 , wherein the first wire and the second wire comprise a high-melting point metal layer.
13. The semiconductor storage device as recited in claim 3 , wherein the P-type semiconductor layer comprises a polysilicon layer in which a P-type impurity is diffused, and the N-type semiconductor layer comprises a polysilicon layer in which an N-type impurity is diffused.
14. The semiconductor storage device as recited in claim 4 , wherein a connection portion between the first wire and the memory cell comprises an N-type silicon plug.
15. The semiconductor storage device as recited in claim 4 , further comprising:
another first wire which is positioned on the side of the second wire opposite from the first wire and extends in the same direction as the first wire;
another interlayer dielectric film which is provided between the second wire and the other first wire; and
another memory cell which is provided at a portion of intersection of the second wire with the other first wire,
wherein a connection portion of the memory cell with the first wire, and a connection portion of the memory cell with the other first wire, are formed from N-type silicon plugs.
16. The semiconductor storage device as recited in claim 3 , wherein the storage element of the memory cell comprises an insulating material the electrical resistance of which is changed by dielectric breakdown, a side face and a bottom face of the contact hole are covered by the insulating material, and the N-type semiconductor layer is buried by the insulating material.
17. The semiconductor storage device as recited in claim 15 , wherein a storage element of the other memory cell comprises an insulating material the electrical resistance of which is changed by dielectric breakdown, and the insulating material is formed in a film and is layered on a surface of the other interlayer dielectric film on the side of the other first wire.
18. The semiconductor storage device as recited in claim 15 , wherein a cross-sectional shape of the memory cell is different from a cross-sectional shape of the other memory cell.
19. The semiconductor storage device as recited in claim 15 , wherein a cross-sectional shape of the memory cell and a cross-sectional shape of the other memory cell are axially symmetric about the second wire.
20. A method of manufacture of a semiconductor storage device, the method comprising:
forming a first wire;
forming an interlayer dielectric film covering the first wire;
providing a contact hole in the interlayer dielectric film, exposing a portion of the first wire;
forming a storage element including an N-type semiconductor layer in the contact hole;
forming a P-type semiconductor film outside of the contact hole and covering the N-type semiconductor layer and the interlayer dielectric film;
forming a conductive film on the P-type semiconductor film; and
patterning the P-type semiconductor film and the conductive film, and forming a second wire intersecting the first wire at the contact hole.
21. The method as recited in claim 20 , further comprising:
forming a P-type semiconductor film on the conductive film.
22. The method as recited in claim 20 , wherein the P-type semiconductor film is formed by using a CVD method to form a polysilicon film, and performing ion implantation of a P-type impurity into the polysilicon film.
23. The method as recited in claim 20 , wherein, after forming the N-type semiconductor layer, the N-type semiconductor layer and the interlayer dielectric film are flattened.
24. The method as recited in claim 20 , wherein the forming of the storage element comprises forming an insulating material.
25. The semiconductor storage device as recited in claim 1 , wherein the storage element comprises a pillar-shaped storage element including a first N-type semiconductor layer formed in the contact hole and on the first wire, a dielectric layer formed in the contact hole and on the first N-type semiconductor layer, and a second N-type semiconductor layer formed in the contact hole and on the dielectric film and having a surface which is co-planar with a surface of the interlayer dielectric film.
26. The semiconductor storage device as recited in claim 25 , wherein the P-type semiconductor of the second wire is formed on the surface of the interlayer dielectric film and on the surface of the second N-type semiconductor layer.