CMOS image sensor and method for fabricating the same
View Patent ↗CMOS image sensor and method for fabricating the same, the CMOS image sensor including a second conductive type semiconductor substrate having an active region and a device isolation region defined therein, wherein the active region has a photodiode region and a transistor region defined therein, a device isolating film in the semiconductor substrate of the device isolation region, a first conductive type impurity region in the semiconductor substrate of the photodiode region, the first conductive type impurity region being spaced a distance from the device isolation film, and a second conductive type first impurity region in the semiconductor substrate between the first conductive type impurity region and the device isolation film, thereby reducing generation of a darkcurrent at an interface between the photodiode region and a field region.
1. A CMOS image sensor comprising:
a second conductive type semiconductor substrate having an active region and a device isolation region defined therein, wherein the active region has a photodiode region and a transistor region defined therein;
a device isolating film in the semiconductor substrate of the device isolation region;
a lightly doped first conductive type impurity region in the semiconductor substrate of the photodiode region, the lightly doped first conductive type impurity region being spaced a distance from the device isolation film;
a medium concentration second conductive type impurity region at a surface of the lightly doped first conductive type impurity region; and
a heavily doped second conductive type impurity region adjacent to the device isolation film in the photodiode region of the substrate, the heavily doped second conductive type impurity region having a width the same as a depth of the medium concentration second conductive type impurity region.
2. The CMOS image sensor as claimed in claim 1 , wherein the heavily doped second conductive type impurity region has a predetermined width.
3. The CMOS image sensor as claimed in claim 1 , wherein the heavily doped second conductive type impurity region has a depth the same as a depth of the lightly doped first conductive type impurity region.
4. The CMOS image sensor as claimed in claim 1 , wherein the heavily doped second conductive type impurity region has a depth the same as a depth of the device isolation film.
5. The CMOS image sensor as claimed in claim 1 , wherein the medium concentration second conductive type impurity region has an impurity concentration heavier than an impurity concentration of the heavily doped second conductive type second impurity region.
6. The CMOS image sensor as claimed in claim 1 , wherein the medium concentration second conductive type impurity region has an impurity concentration the same as an impurity concentration of the heavily doped second conductive type impurity region.
7. The CMOS image sensor as claimed in claim 1 , further comprising a second medium concentration second conductive type impurity region at an interface of the device isolating film and the photodiode region.
8. The CMOS image sensor as claimed in claim 7 , wherein the second medium concentration second conductive type impurity region has a depth deeper than a depth of the medium concentration second conductive type impurity region at the surface of the lightly doped first conductive type impurity region.
9. The CMOS image sensor as claimed in claim 7 , wherein the second medium concentration second conductive type impurity region has a depth the same as a depth of the device isolation film.
10. The CMOS image sensor as claimed in claim 7 , wherein the second medium concentration second conductive type impurity region has a width the same as a depth of the medium concentration second conductive type impurity region at the surface of the lightly doped first conductive type impurity region.
11. The CMOS image sensor as claimed in claim 1 , further comprising an insulating layer on the substrate inclusive of the gate electrode, exposing the device isolating film and a predetermined portion of the photodiode region adjacent to the device isolating film.
12. The CMOS image sensor as claimed in claim 11 , wherein the insulating film exposes the photodiode region by a width in a range of 400˜600 Å.
13. The CMOS image sensor as claimed in claim 11 , wherein the insulating film comprises a SiH 4 film, a USG (undoped silicate glass) film, a BPSG (borophosphosilicate glass) film, or a TEOS (tetraethyl orthosilicate) film.
14. The CMOS image sensor as claimed in claim 11 , wherein the insulating film has a thickness smaller than a depth of the device isolation film by 300˜500 Å.
15. The CMOS image sensor as claimed in claim 11 , wherein the insulating film has a thickness of 2000˜3000 Å.
16. The CMOS image sensor as claimed in claim 1 , wherein the second conductive type impurity region has a depth deeper than a depth of the device isolation film.
17. The CMOS image sensor as claimed in claim 1 , further comprising spacers at sidewalls of the gate electrode.
18. The CMOS image sensor as claimed in claim 1 , wherein the semiconductor substrate comprises an epitaxial layer on a heavily doped second conductive type substrate.