IP Library Patent Application 12062403
Patent Application
App. No. 12/062,403

Flip Chip Interconnection Structure Having Void-Free Fine Pitch and Method Thereof

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Quick Facts
Patent No.
US None
App. No.
12/062,403
Abstract

A semiconductor device is made by providing a semiconductor die having a contact pad, forming a circular solder bump on the contact pad, providing a substrate having a trace line, disposing a non-circular solder resist opening over the trace line, placing the solder bump in proximity to the trace line, and reflowing the circular solder bump to metallurgically connect the circular solder bump to the trace line. The circular solder bump contacts less than an entire perimeter of the non-circular solder resist opening which creates one or more vents in areas where the circular solder bump is discontinuous with the non-circular solder resist opening. The non-circular solder resist opening can be a rectangle, triangle, ellipse, oval, star, and tear-drop. An underfill material is deposited under the first substrate. The underfill material penetrates through the vents to fill an area under the solder bump.

Claims (54)

1 . A method of packaging a semiconductor device, comprising:

providing a semiconductor die having a contact pad;

forming a rounded solder bump on the contact pad;

providing a substrate having a trace line;

disposing a rectangular solder resist opening over the trace line, wherein the rectangular solder resist opening defines a first area that is larger than a second area occupied by the trace line within the first area;

placing the rounded solder bump in proximity to the trace line, wherein a space between the semiconductor die and the substrate is devoid of underfill material after the placement;

reflowing the rounded solder bump to form a collapsed solder bump having a shape that does not conform to the rectangular solder resist opening, the collapsed solder bump metallurgically connecting the contact pad to the trace line, wherein the collapsed solder bump does not entirely occupy the first area;

forming vents between the rectangular solder resist opening and the collapsed solder bump within the first area by contacting less than an entire perimeter of the rectangular solder resist opening with the collapsed solder bump; and

depositing underfill material between the semiconductor die and the substrate, wherein the underfill material fills a volume between the collapsed solder bump and the substrate through the vents created by discontinuities formed between the rectangular solder resist opening and the collapsed solder bump within the first area.

2 . The method of claim 1 , wherein the trace line is a straight conductor.

3 . The method of claim 1 , wherein the trace line includes a rounded contact pad.

4 . The method of claim 1 , wherein the rectangular solder resist opening is approximately equal to a width of the collapsed solder bump.

5 . (canceled)

6 . A method of packaging a semiconductor device, comprising:

providing a first substrate having a contact pad;

forming a circular solder bump on the contact pad;

providing a second substrate having a trace line;

disposing a non-circular solder resist opening over the trace line, wherein the non-circular solder resist opening defines a first area that is larger than a second area occupied by the trace line within the first area;

placing the circular solder bump in proximity to the trace line, wherein a space between the first substrate and the second substrate is devoid of underfill material after the placement;

reflowing the circular solder bump to form a collapsed solder bump having a shape that does not conform to the non-circular solder resist opening, the collapsed solder bump metallurgically connecting the contact pad to the trace line, wherein the collapsed solder bump does not entirely occupy the first area;

forming vents between the non-circular solder resist opening and the collapsed solder bump within the first area by contacting less than an entire perimeter of the non-circular solder resist opening with the collapsed solder bump; and

depositing underfill material between the first substrate and the second substrate, wherein the underfill material fills a volume between the collapsed solder bump and the second substrate through the vents created by discontinuities formed between the non-circular solder resist opening and the collapsed solder bump within the first.

7 . The method of claim 6 , wherein the first substrate is part of a semiconductor die.

8 . The method of claim 6 , wherein the non-circular solder resist opening has a shape selected from the group of a rectangle, triangle, ellipse, oval, star, and tear-drop.

9 . The method of claim 6 , wherein the trace line is a straight conductor.

10 . The method of claim 6 , wherein the trace line includes a rounded contact pad.

11 . The method of claim 8 , wherein the rectangular solder resist opening is approximately equal to a width of the collapsed solder bump.

12 . A method of packaging a semiconductor device, comprising:

providing a first substrate having a contact pad;

forming a solder bump on the contact pad;

providing a second substrate having a trace line;

disposing a solder resist opening over the trace line, the solder resist opening having a shape which is mismatched to a shape of the solder bump, wherein the solder resist opening defines a first area that is larger than a second area occupied by the trace line within the first area;

placing the solder bump in proximity to the trace line, wherein a space between the first substrate and the second substrate is devoid of underfill material after the placement;

reflowing the solder bump to form a collapsed solder bump having a shape that does not conform to the solder resist opening, the collapsed solder bump metallurgically connecting the contact pad to the trace line, wherein the collapsed solder bump does not entirely occupy the first area;

forming vents between the solder resist opening and the collapsed solder bump within the first area by contacting less than an entire perimeter of the solder resist opening with the collapsed solder bump; and

depositing underfill material between the first substrate and the second substrate, wherein the underfill material fills a volume between the collapsed solder bump and the second substrate through the vents created by discontinuities formed between the solder resist opening and the collapsed solder bump within the first area.

13 . The method of claim 12 , wherein the first substrate is part of a semiconductor die.

14 . The method of claim 12 , wherein the solder bump is circular.

15 . The method of claim 12 , wherein the solder bump is non-circular.

16 . The method of claim 12 , wherein the solder resist opening has a shape selected from the group of a rectangle, triangle, ellipse, oval, star, and tear-drop.

17 . The method of claim 12 , wherein the trace line is a straight conductor.

18 . The method of claim 12 , wherein the trace line includes a rounded contact pad.

19 . The method of claim 16 , wherein the rectangular solder resist opening is approximately equal to a width of the collapsed solder bump.

20 . A semiconductor package, comprising:

a first substrate having a contact pad;

a circular solder bump formed on the contact pad;

a second substrate having a trace line, the circular solder bump being metallurgically connected to the trace line;

a non-circular solder resist opening formed over the trace line, wherein the circular solder bump contacts one or more portions of a perimeter of the non-circular solder resist opening but does not contact other portions of the perimeter of the non-circular solder resist opening to create one or more vents in areas where the circular solder bump is discontinuous with the non-circular solder resist opening; and

an underfill material disposed under the first substrate, the underfill material penetrating through the vents to fill an area under the circular solder bump.

21 . The semiconductor package of claim 20 , wherein the first substrate is part of a semiconductor die.

22 . The semiconductor package of claim 20 , wherein the non-circular solder resist opening has a shape selected from the group of a rectangle, triangle, ellipse, oval, star, and tear-drop.

23 . The semiconductor package of claim 20 , wherein the trace line is a straight conductor.

24 . The semiconductor package of claim 20 , wherein the trace line includes a rounded contact pad.

25 . The semiconductor package of claim 22 , wherein the rectangular solder resist opening is approximately equal to a width of the circular solder bump.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053476/0094 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 039514 FRAME: 0451. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 26, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039980/0838 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0442 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2008
From: PENDSE, RAJENDRA D.; MURPHY, STEPHEN A.
To: STATS CHIPPAC, LTD.
Reel/Frame 020754/0209 →