IP Library Granted Patent US 7,921,344
Granted Patent B2
US 7,921,344 · App. 12/084,834 · Granted Apr 5, 2011

Multi-stage data processor with signal repeater

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Quick Facts
Patent No.
US 7,921,344
App. No.
12/084,834
Granted
Apr 5, 2011
Kind
B2
Abstract

A signal processing device having a plurality of processing stages, each of the plurality of processing stages being adapted for applying an input signal to each of at least one item under examination to be coupled to a respective one of the plurality of processing stages, and at least one signal reconditioning unit, each of the at least one signal reconditioning unit being adapted for reconditioning the input signal in a signal path between a preceding one of the plurality of processing stages and a subsequent one of the plurality of processing stages.

Claims (37)

1. A signal processing device comprising:

a plurality of processing stages, each of the plurality of processing stages being adapted for applying a test signal to each of at least one item under examination to be coupled to a respective one of the plurality of processing stages;

a signal reconditioning unit adapted for reconditioning an input signal;

wherein one of the plurality of processing stages comprises an input connectable to an input signal generation unit for receiving the input signal therefrom and wherein the one of the plurality of processing stages is adapted for supplying the input signal to the signal reconditioning unit, and

wherein an input of a subsequent processing stage is connected to the signal reconditioning unit for receiving a reconditioned input signal therefrom.

2. The device of claim 1 , wherein the processing stages are coupled to one another in such a manner that the input signal can be applied to at least two of the plurality of processing stages as a common input signal.

3. The device of claim 1 , wherein the processing stages are coupled to one another in such a manner that a plurality of input signals can be applied to at least two of the plurality of processing stages as a common input signal.

4. The device of claim 1 , wherein the input signal generation unit adapted for generating the input signal.

5. The device of claim 4 , wherein the input signal generation unit is adapted for generating a plurality of input signals.

6. The device of claim 4 , wherein the input signal generation unit is coupled to at least two of the plurality of processing stages via at least one common wire carrying the input signal to be supplied to the at least two of the plurality of processing stages.

7. The device of claim 1 , wherein a signal path between a first one of the plurality of processing stages and the input signal generation unit is free of a signal reconditioning unit so that the input signal is applyable directly from the input signal generation unit to the first one of the plurality of processing stages.

8. The device of claim 1 , wherein the input signal generation unit is adapted for generating the input signal as a stimulating signal for performing a test for testing the at least one item under examination coupled or to be coupled to at least one of the plurality of processing stages.

9. The device of claim 1 , comprising, for at least two of the plurality of processing stages, the respective at least one item under examination.

10. The device of claim 9 , wherein at least a part of the items under examination are devices under test.

11. The device of claim 1 , wherein at least a part of the items under examination are memory devices under test.

12. The device of claim 1 , wherein at least a part of the plurality of processing stages are coupled to one another as a Daisy chain.

13. The device of claim 1 , wherein the signal reconditioning unit is a repeater unit.

14. The device of claim 1 , wherein at least a part of the plurality of processing stages is adapted to receive, from each of the respectively assigned at least one item under examination, a plurality of response signals in response to the input signal applied to each of the respectively assigned at least one item under examination.

15. The device of claim 14 , wherein at least a part of the plurality of processing stages is adapted to generate, based on the plurality of response signals of each of the respectively assigned at least one item under examination, a decreased number of response signals.

16. The device of claim 15 , wherein the decreased number of response signals is indicative of a test result of testing the respectively assigned at least one item under examination.

17. The device of claim 15 , wherein the decreased number of response signals is one.

18. The device of claim 1 , wherein at least a part of the plurality of processing stages is adapted to fan out the input signal to at least two of the respectively assigned at least one item under examination.

19. The device of claim 1 , comprising a timing signal generation unit adapted for generating a timing signal and adapted for supplying the timing signal to at least two of the plurality of processing stages for timing the signal processing of the at least two of the plurality of processing stages.

20. The device of claim 19 , wherein at least two of the plurality of processing stages is adapted to fan out the timing signal to at least two of the respectively assigned at least one item under examination.

21. A measurement apparatus, the measurement apparatus comprising:

an input signal generation unit adapted for generating an input signal related to a measurement carried out by the measurement apparatus;

a signal processing device for processing the input signal and for generating an output signal indicative of a result of the measurement carried out based on the input signal, the signal processing device comprising:

a plurality of processing stages, each of the plurality of processing stages being adapted for applying a test signal to each of at least one item under examination to be coupled to a respective one of the plurality of processing stages;

a signal reconditioning unit adapted for reconditioning the input signal;

wherein one of the plurality of processing stages comprises an input connectable to the input signal generation unit for receiving the input signal therefrom and wherein the one of the plurality of processing stages is adapted for supplying the input signal to the signal reconditioning unit, and

wherein an input of a subsequent processing stage is connected to the signal reconditioning unit for receiving a reconditioned input signal therefrom.

22. The measurement apparatus of claim 21 , comprising at least one of a test device for testing a device under test or a substance, a memory test device for testing a memory device under test or a substance, a device for chemical, biological and/or pharmaceutical analysis, a fluid separation system adapted for separating compounds of a fluid, a capillary electrophoresis device, a liquid chromatography device, a gas chromatography device, an electronic measurement device, and a mass spectroscopy device.

23. The measurement apparatus of claim 21 ,

wherein the measurement apparatus comprises a first measurement unit adapted for performing a first part of a measurement;

wherein the measurement apparatus comprises a second measurement unit adapted for performing a second part of the measurement;

wherein at least a part of the measurement functionality of the first measurement unit is not included in the measurement functionality of the second measurement unit and/or wherein at least a part of the measurement functionality of the second measurement unit is not included in the measurement functionality of the first measurement unit.

24. The measurement apparatus of claim 23 , wherein the first measurement unit is coupled to the second measurement unit to provide an automatic feed forward function.

Assignments (5)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 035371 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Apr 14, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035425/0768 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2015
From: ADVANTEST (SINGAPORE) PTE. LTD.
To: ADVANTEST CORPORATION
Reel/Frame 035371/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2012
From: VERIGY (SINGAPORE) PTE LTD
To: ADVANTEST (SINGAPORE) PTE LTD
Reel/Frame 027896/0018 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2008
From: SERRER, JUERGEN
To: VERIGY (SINGAPORE) PTE. LTD.
Reel/Frame 020962/0711 →