IP Library Granted Patent US 7,906,430
Granted Patent B2
US 7,906,430 · App. 12/109,800 · Granted Mar 15, 2011

Method of manufacturing a semiconductor device with a peeling prevention layer

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Quick Facts
Patent No.
US 7,906,430
App. No.
12/109,800
Granted
Mar 15, 2011
Kind
B2
Abstract

A peeling prevention layer for preventing an insulation film and a protection layer from peeling is formed in corner portions of a semiconductor device. The peeling prevention layer can increase its peeling prevention effect more when formed in a vacant space of the semiconductor device other than the corner portions, for example, between ball-shaped conductive terminals. In a cross section of the semiconductor device, the peeling prevention layer is formed on the insulation film on the back surface of the semiconductor substrate, and the protection layer formed of a solder resist or the like is formed covering the insulation film and the peeling prevention layer. The peeling prevention layer has a lamination structure of a barrier seed layer and a copper layer formed thereon when formed by an electrolytic plating method.

Claims (15)

1. A method of manufacturing a semiconductor device, comprising:

providing a semiconductor substrate comprising a first insulation film formed on a front surface of the semiconductor substrate and a pad electrode formed on the first insulation film;

forming from a back surface of the semiconductor substrate a via hole to penetrate the semiconductor substrate in a position of the semiconductor substrate corresponding to the pad electrode;

forming a second insulation film to cover a sidewall of the via hole and the back surface;

etching the second insulation film so as to expose at least part of the pad electrode;

forming a metal layer in the via hole so as to be in contact with the exposed pad electrode and on the back surface covered by the second insulation film;

patterning the metal layer to form a penetrating electrode disposed in the via hole and connected with the pad electrode and a peeling prevention layer disposed on the second insulation film so as to be electrically isolated;

forming a protection layer covering the penetrating electrode, the second insulation film and the peeling prevention layer; and

cutting the semiconductor substrate covered by the protection layer so as to produce a semiconductor device comprising the penetrating electrode and the peeling prevention layer,

wherein the peeling prevention layer is not electrically connected to any device element formed on the front or back surface of the semiconductor substrate after the cutting of the semiconductor substrate.

2. The method of claim 1 , wherein the metal layer is formed by an electrolytic plating method.

3. The method of claim 1 , wherein the peeling prevention layer is formed in a corner portion of the semiconductor substrate.

4. The method of claim 1 , further comprising forming a recess in the back surface when the via hole is formed, wherein part of the second insulation film and part of the peeling prevention layer are formed in the recess.

5. The method of claim 1 , further comprising dividing the protection layer into a plurality of regions.

6. The method of claim 1 , wherein the forming of the metal layer comprises forming a copper layer.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2014
From: KANTO SANYO SEMICONDUCTOR CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 033713/0296 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT #12/577882 PREVIOUSLY RECORDED ON REEL 026594 FRAME 0385. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2014
From: SANYO ELECTRIC CO., LTD
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 032836/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2014
From: UMEMOTO, MITSUO; KAMEYAMA, KOJIRO; SUZUKI, AKIRA
To: SANYO ELECTRIC CO., LTD; KANTO SANYO SEMICONDUCTORS CO., LTD.
Reel/Frame 032478/0266 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2011
From: SANYO ELECTRIC CO., LTD.
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 026594/0385 →