IP Library Granted Patent US 8,981,548
Granted Patent B2
US 8,981,548 · App. 12/123,995 · Granted Mar 17, 2015

Integrated circuit package system with relief

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Quick Facts
Patent No.
US 8,981,548
App. No.
12/123,995
Granted
Mar 17, 2015
Kind
B2
Abstract

An integrated circuit package system including: providing a die pad with a top, sides, and a bottom, the bottom having a relief with a flat surface and defining a wall and a center pad; mounting a barrier under the bottom of the die pad; mounting an integrated circuit die on the top of the die pad; encapsulating the integrated circuit die and the top and sides of the die pad with the wall preventing encapsulation from flowing along the barrier to reach the center pad; and mounting an external interconnect on the center pad.

Claims (58)

1. A method for manufacturing an integrated circuit package system comprising:

providing a die pad with a top and a bottom, the bottom having a wall, a center pad, and a relief having a flat surface, the relief physically defining an inner sidewall of the wall and a pad sidewall of the center pad with the inner sidewall directly facing the pad sidewall, the wall includes an outer sidewall on a side of the wall facing opposite to the inner sidewall;

mounting a barrier under the bottom of the die pad;

mounting an integrated circuit die on the top of the die pad, with a die sidewall of the integrated circuit die between the inner sidewall and the pad sidewall;

encapsulating the integrated circuit die and the die pad with an encapsulation, the encapsulating entirely covering the outer sidewall and wherein the bottom, the inner sidewall, the flat surface of the relief and the center pad are entirely exposed from the encapsulation;

detaching the barrier; and

mounting an external interconnect on the center pad.

2. The method as claimed in claim 1 wherein:

providing the die pad with the center pad includes providing a quadrilateral center pad.

3. The method as claimed in claim 1 wherein:

providing the die pad with the center pad includes providing a circular center pad.

4. The method as claimed in claim 1 wherein:

providing the die pad includes providing quadrilateral multiple center pads.

5. The method as claimed in claim 1 wherein:

providing the die pad includes a pre-plated finish material of gold, palladium, and nickel.

6. A method for manufacturing an integrated circuit package system comprising:

providing a die pad with a top and a bottom, the bottom having a wall, multiple center pads, and a relief with a flat surface, the relief physically defining an inner sidewall of the wall and a pad sidewall of a pad of the multiple center pads with the inner sidewall directly facing the pad sidewall, the wall includes an outer sidewall on a side of the wall facing opposite to the inner sidewall;

mounting a barrier under the bottom of the die pad;

mounting an integrated circuit die on the top of the die pad, with a die sidewall of the integrated circuit die between the inner sidewall and the pad sidewall;

encapsulating the integrated circuit die and the die pad with an encapsulation, the encapsulation entirely covering the outer sidewall and wherein the bottom, the inner sidewall, the flat surface of the relief and the multiple center pads are entirely exposed from the encapsulation;

detaching the barrier; and

mounting a solder bump on each of the multiple center pads.

7. The method as claimed in claim 6 wherein:

providing the die pad with the multiple center pads includes providing quadrilateral multiple center pads, circular multiple center pads, or quadrilateral multiple center pads.

8. The method as claimed in claim 6 wherein:

mounting the integrated circuit die on the die pad includes mounting a wire-bonded die with an active side and attached with a die attach adhesive.

9. The method as claimed in claim 6 further comprising:

providing half-etched bond fingers; and wherein:

mounting the solder bump includes mounting the solder bump below the half-etched bond fingers; and

connecting the integrated circuit die includes connecting the integrated circuit die with bond wires to the half-etched bond fingers.

10. The method as claimed in claim 6 wherein:

mounting the solder bump includes the pad sidewall exposed from the solder bump.

11. An integrated circuit package system comprising:

a die pad with a top and a bottom, the bottom having a wall, a center pad, and a relief having a flat surface, the relief physically defining an inner sidewall of the wall and a pad sidewall of the center pad with the inner sidewall directly facing the pad sidewall, the wall includes an outer sidewall on a side of the wall facing opposite to the inner sidewall;

an integrated circuit die mounted on the top of the die pad, with a die sidewall of the integrated circuit die between the inner sidewall and the pad sidewall;

an encapsulation formed on the integrated circuit die and the die pad, the encapsulation entirely covering the outer sidewall and wherein the bottom, the inner sidewall, the flat surface of the relief and the center pads are entirely exposed from the encapsulation; and

an external interconnect mounted on the center pad.

12. The system as claimed in claim 11 wherein:

the center pad is a quadrilateral center pad.

13. The system as claimed in claim 11 wherein:

the center pad is a circular center pad.

14. The system as claimed in claim 11 wherein:

the die pad includes quadrilateral multiple center pads.

15. The system as claimed in claim 11 wherein:

the die pad includes a pre-plated finish material of gold, palladium, and nickel.

16. The system as claimed in claim 11 wherein:

the die pad includes multiple center pads; and

the external interconnect is a solder bump.

17. The system as claimed in claim 16 wherein:

the multiple center pads are quadrilateral multiple center pads, circular multiple center pads, or quadrilateral multiple center pads.

18. The system as claimed in claim 16 wherein:

the integrated circuit die mounted on the top of the die pad is a wire-bonded die with an active side and attached with a die attach adhesive.

19. The system as claimed in claim 16 further comprising:

a bond finger;

a bond wire between the integrated circuit die and the bond finger; and wherein:

the solder bump is mounted below the bond finger.

20. The system as claimed in claim 16 wherein:

the solder bump is mounted to each of the multiple center pads and the pad sidewall is exposed from the solder bump.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0145. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064806/0001 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0145 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2008
From: SHIM, IL KWON; PUNZALAN, JEFFREY D.; BATHAN, HENRY DESCALZO
To: STATS CHIPPAC LTD.
Reel/Frame 021042/0495 →