IP Library Granted Patent US 8,238,349
Granted Patent B2
US 8,238,349 · App. 12/141,157 · Granted Aug 7, 2012

Method of accessing stored information in multi-framed data transmissions

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Quick Facts
Patent No.
US 8,238,349
App. No.
12/141,157
Granted
Aug 7, 2012
Kind
B2
Abstract

The present invention discloses a method of accessing stored information in multi-framed data transmissions, comprising at least one control interface and at least one elastic store, wherein the control interface accesses the elastic store through a mailbox communications method. The control interface accesses the elastic store via the mailbox communications method, which comprises: (a) setting a address for a data location within said elastic store; (b) setting a request to read from, or write to, said data location within said elastic store; (c) issuing a “GO_” signal to retrieve data information from said data location within said elastic store, by writing said “GO_” signal to said microprocessor, which causes a circuit to read from said requested data location within said elastic store; (d) waiting for a possible, but not to be expected, de-assertion of a busy signal to be issued from said data location within said elastic store, and then; and then (e) reading back the value of said data information to said control interface. Where a busy signal occurs, the microprocessor must wait and issue a subsequent “GO_” signal to retrieve the data information from the data location; where a busy signal does not occur the “GO_” signal causes the circuit to read from the requested data location and send the data information back to the microprocessor, where the data information is stored in a user-accessible register.

Claims (60)

1. A system comprising:

register map circuitry coupled to a processor and an elastic store, wherein the register map circuitry is configured to:

receive a request for data from the processor;

receive the data from the elastic store in response to requesting the data from the elastic store; and

store the data in a memory of the register map circuitry, wherein:

the data stored in the memory of the register map circuitry is accessible by the processor,

the processor is configured to access the elastic store for read and write operations using a mailbox communication method, and

the system further comprises control circuitry configured to:

set an address for a data location of the requested data within the elastic store;

set a request to read from or write to the data location of the requested data within the elastic store; and

receive, at the register map circuitry, a signal issued by the processor, wherein the register map circuitry is further configured to request the data from the data location within the elastic store in response to the received signal.

2. The system of claim 1 , wherein the register map circuitry is further configured to:

receive further data from the processor; and

write the further data to the elastic store.

3. The system of claim 1 , wherein the control circuitry is further configured to wait for a de-assertion of a busy signal associated with the data location of the requested data within the elastic store.

4. The system of claim 3 , wherein the control circuitry is further configured to:

issue, with the processor, in response to receiving the busy signal, a further signal to the register map circuitry, wherein the register map circuitry is further configured to request the data from the data location within the elastic store in response to the issued further signal.

5. The system of claim 1 , wherein the register map circuitry is further configured to receive expected data from the processor, further comprising control circuitry configured to:

compare the expected data to data stored in the elastic store; and

provide an indication to the register map circuitry in response to detecting a disparity between the expected data and the data stored in the elastic store.

6. The system of claim 1 , wherein the data received from the elastic store comprises a portion of an OTN frame, a SONET frame, or an SDH frame.

7. The system of claim 1 , further comprising control circuitry configured to:

receive a plurality of incoming frames on a datapath; and

store portions of the plurality of incoming frames in the elastic store in response to determining that a predetermined number of the portions of the plurality of incoming frames are equal to each other.

8. A method comprising:

receiving, with register map circuitry coupled to a processor and an elastic store, a request for data from the processor;

receiving, with the register map circuitry, the data from the elastic store in response to requesting, with the register map circuitry the data from the elastic store; and

storing the data in a memory of the register map circuitry, wherein:

the data stored in the memory of the register map circuitry is accessible by the processor, and

the processor is configured to access the elastic store for read and write operations using a mailbox communication method;

setting, with control circuitry, an address for a data location of the requested data within the elastic store;

setting, with control circuitry, a request to read from or write to the data location of the requested data within the elastic store; and

receiving, at the register map circuitry, a signal issued by the processor, wherein the register map circuitry is further configured to request the data from the data location within the elastic store in response to the received signal.

9. The method of claim 8 , further comprising:

receiving, with the register map circuitry, further data from the processor; and

writing, with the register map circuitry, the further data to the elastic store.

10. The method of claim 8 , wherein the control circuitry is further configured to wait for a de-assertion of a busy signal associated with the data location of the requested data within the elastic store.

11. The method of claim 10 , further comprising:

issuing, with the processor, in response to receiving the busy signal, a further signal to the register map circuitry, wherein the register map circuitry is further configured to request the data from the data location within the elastic store in response to the issued further signal.

12. The method of claim 8 , further comprising:

comparing expected data received from the processor to data stored in the elastic store; and

providing an indication to the register map circuitry in response to detecting a disparity between the expected data and the data stored in the elastic store.

13. The method of claim 8 , wherein the data received from the elastic store comprises a portion of an OTN frame, a SONET frame, or an SDH frame.

14. The method of claim 8 , further comprising:

receiving a plurality of incoming frames on a datapath; and

storing portions of the plurality of incoming frames in the elastic store in response to determining that a predetermined number of the portions of the plurality of incoming frames are equal to each other.

15. A system comprising:

register map circuitry coupled to a processor and an elastic store, wherein the register map circuitry is configured to:

receive, from the processor, a request for a portion of a frame received on a datapath, wherein the portion of the received frame comprises an identifier of a source of the received frame and an identifier of a destination of the received frame;

receive, from the elastic store, the portion of the received frame from the elastic store in response to transmitting a request to the elastic store for the portion of the received frame; and

store the portion of the received frame in a memory of the register map circuitry, wherein:

the processor is configured to access the portion of the received frame stored in the memory of the register map circuitry,

the processor is configured to access the elastic store for read and write operations using a mailbox communication method, and

the system further comprises control circuitry configured to:

set an address for a data location of the requested data within the elastic store;

set a request to read from or write to the data location of the requested data within the elastic store; and

receive, at the register map circuitry, a signal issued by the processor, wherein the register map circuitry is further configured to request the data from the data location within the elastic store in response to the received signal.

16. The system of claim 15 , wherein the register map circuitry is further configured to:

receive a request from a processor to insert a further portion of a frame into a further frame that is to be transmitted on the datapath, wherein the further portion of the frame that is to be transmitted on the datapath comprises an identifier of a source of the further frame that is to be transmitted on the datapath and an identifier of a destination of the further frame that is to be transmitted on the datapath; and

transmit, to the elastic store, a request to store the further portion of the frame to be inserted into the further frame that is to be transmitted on the datapath.

Assignments (11)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2024
From: INTEL CORPORATION
To: ALTERA CORPORATION
Reel/Frame 066353/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2022
From: INTEL TECHNOLOGY OF CANADA, ULC
To: INTEL CORPORATION
Reel/Frame 061368/0947 →
CHANGE OF NAME Recorded Oct 10, 2022
From: INTEL TECHNOLOGY OF CANADA, LTD.
To: INTEL TECHNOLOGY OF CANADA, ULC
Reel/Frame 061359/0223 →
MERGER AND CHANGE OF NAME Recorded Aug 29, 2022
From: ALTERA CANADA LTD.; INTEL OF CANADA, LTD.
To: INTEL OF CANADA, LTD.
Reel/Frame 060921/0206 →
CHANGE OF NAME Recorded Aug 29, 2022
From: ALTERA CANADA CO.
To: ALTERA CANADA LTD.
Reel/Frame 061333/0007 →
CHANGE OF NAME Recorded Aug 29, 2022
From: INTEL OF CANADA, LTD.
To: INTEL TECHNOLOGY OF CANADA, LTD.
Reel/Frame 061334/0500 →
CHANGE OF NAME Recorded Jan 9, 2012
From: ALTERA NEWFOUNDLAND TECHNOLOGY CORP.
To: ALTERA CANADA CO.
Reel/Frame 027500/0519 →
CHANGE OF NAME Recorded Apr 26, 2011
From: AVALON MICROELECTONICS INC.
To: ALTERA NEWFOUNDLAND TECHNOLOGY CORP.
Reel/Frame 026181/0242 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2008
From: HAAS, WALLY; ANSTEY, MICHAEL KENNETH
To: AVALON MICROELECTRONICS, INC.
Reel/Frame 021541/0980 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2008
From: HAAS, WALLY; ANSTEY, MICHAEL KENNETH
To: AVALON MICROELECTRONICS, INC.
Reel/Frame 021113/0214 →