IP Library Granted Patent US 7,821,822
Granted Patent B2
US 7,821,822 · App. 12/191,956 · Granted Oct 26, 2010

Read/write elements for a three-dimensional magnetic memory

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Quick Facts
Patent No.
US 7,821,822
App. No.
12/191,956
Granted
Oct 26, 2010
Kind
B2
Abstract

Read/write elements for three-dimensional magnetic memories are disclosed. One embodiment describes an array of integrated read/write elements. The array includes read conductors formed proximate to one of the layers (i.e., storage stacks) of the three-dimensional magnetic memory. The array also includes flux caps formed proximate to the read conductors, and read sensors formed proximate to the flux caps. The array also includes a magnetic pole having a first end contacting the read sensor and a second end opposite the first end. First write conductors are fabricated between the magnetic poles, and second write conductors are also fabricated between the magnetic poles orthogonal to the first write conductors. The first write conductors and the second write conductors form current loops around the magnetic poles.

Claims (68)

1. A magnetic memory, comprising:

a plurality of storage stacks fabricated on top of one another to form a three-dimensional memory structure; and

an array of read/write elements proximate to one of the storage stacks;

wherein the array of read/write elements comprises:

read conductors formed proximate to the one of the storage stacks;

read sensors; and

flux caps formed between the read sensors and the read conductors.

2. The magnetic memory of claim 1 wherein the read sensors comprise magnetoresistance (MR) sensors.

3. The magnetic memory of claim 2 wherein the MR sensors are formed from films having perpendicular anisotropy.

4. The magnetic memory of claim 1 wherein the array of read/write elements comprises:

magnetic poles each having a first end contacting a read sensor and a second end opposite the first end;

first write conductors fabricated between the magnetic poles; and

second write conductors fabricated between the magnetic poles orthogonal to the first write conductors;

wherein the first write conductors and the second write conductors form current loops around the magnetic poles.

5. The magnetic memory of claim 4 wherein the array of read/write elements further comprises:

transistors having sources connected to the second end of the magnetic poles.

6. The magnetic memory of claim 5 further comprising:

a control system operable to selectively inject current through pairs of the first write conductors and through pairs of the second write conductors to create magnetic fields in selected magnetic poles that write magnetic domains into the one storage stack.

7. The magnetic memory of claim 6 wherein:

the control system is further operable to selectively apply voltages to selected read conductors, and to measure the resistances of the read sensors associated with the selected read conductors through the transistors in order to detect the existence of magnetic domains written into the one storage stack.

8. The magnetic memory of claim 1 wherein the plurality of storage stacks of the three-dimensional memory structure includes:

a first storage stack defining a first plane; and

at least one secondary storage stack defining a second plane that is parallel to the first plane.

9. An array of integrated read/write elements for a three-dimensional magnetic memory, the array comprising:

read conductors formed proximate to one of the layers of the three-dimensional magnetic memory;

flux caps formed proximate to the read conductors;

read sensors formed proximate to the flux caps;

magnetic poles each having a first end contacting a read sensor and a second end opposite the first end;

first write conductors fabricated between the magnetic poles; and

second write conductors fabricated between the magnetic poles orthogonal to the first write conductors.

10. The array of claim 9 wherein the read sensors comprise magnetoresistance (MR) sensors.

11. The array of claim 10 wherein the MR sensors are formed from films having perpendicular anisotropy.

12. The array of claim 10 further comprising:

transistors having sources connected to the second end of the magnetic poles.

13. The array of claim 12 further comprising:

a control system operable to selectively inject current through pairs of the first write conductors and through pairs of the second write conductors to create magnetic fields in selected magnetic poles that write magnetic domains into the one layer of the three-dimensional magnetic memory.

14. The array of claim 13 wherein:

the control system is further operable to selectively apply voltages to selected read conductors, and to measure the resistances of the read sensors associated with the selected read conductors through the transistors in order to detect the existence of magnetic domains written into the one layer of the three-dimensional magnetic memory.

15. An array of read elements for a three-dimensional magnetic memory, the array comprising:

read conductors formed proximate to one of a plurality of stacked layers for the three-dimensional magnetic memory, wherein the one of the stacked layers includes a plurality of magnetic domains representing a page of bits;

flux caps formed proximate to the read conductors;

read sensors formed proximate to the flux caps; and

transistors having sources connected to the read sensors through a conductive material.

16. The array of claim 15 wherein the read sensors comprise magnetoresistance (MR) sensors.

17. The array of claim 16 wherein the MR sensors are formed from films having perpendicular anisotropy.

18. The array of claim 16 further comprising:

a control system operable to selectively apply voltages to selected read conductors, and to measure the resistances of the read sensors associated with the selected read conductors through the transistors in order to detect the existence of magnetic domains in the one of the stacked layers and read the page of bits from the one of the stacked layers.

19. An array of write elements for a three-dimensional magnetic memory, the array comprising:

magnetic poles having first ends proximate to one of a plurality of stacked layers for the three-dimensional magnetic memory and extending perpendicular to the one of the stacked layers to second ends;

first write conductors fabricated between the magnetic poles; and

second write conductors fabricated between the magnetic poles orthogonal to the first write conductors.

20. The array of claim 19 further comprising:

a control system operable to selectively inject current through pairs of the first write conductors and through pairs of the second write conductors to create magnetic fields in selected magnetic poles that write magnetic domains into the one of the stacked layers.

21. A method of fabricating a magnetic memory, the method comprising:

forming a plurality of magnetic poles in an array;

forming a plurality of first write conductors that are aligned in parallel and are fabricated between the magnetic poles;

forming a plurality of second write conductors that are aligned in parallel and are fabricated between the magnetic poles orthogonal to the first write conductors;

forming read sensors on the magnetic poles;

forming flux caps on the read sensors; and

forming read conductors on the flux caps that are aligned in parallel.

22. The method of claim 21 further comprising:

forming a first storage stack above the read conductors.

23. The method of claim 21 further comprising:

forming one or more secondary storage stacks above the first storage stack.

24. The method of claim 21 wherein forming read sensors on the magnetic poles comprises:

depositing a pinned layer;

depositing a tunnel barrier layer; and

depositing a free layer.

Assignments (12)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040826/0821 →
CHANGE OF NAME Recorded Oct 25, 2012
From: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
To: HGST NETHERLANDS B.V.
Reel/Frame 029341/0777 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2008
From: FONTANA JR., ROBERT E.; KATINE, JORDAN A.; TSANG, CHING HWA; STIPE, BARRY; TERRIS, BRUCE D.
To: HITACHI GLOBAL STORAGE TECHNOLOGIES NETHERLANDS B.V.
Reel/Frame 021392/0712 →