IP Library Granted Patent US 8,288,860
Granted Patent B2
US 8,288,860 · App. 12/207,493 · Granted Oct 16, 2012

Memory device system with stacked packages

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,288,860
App. No.
12/207,493
Granted
Oct 16, 2012
Kind
B2
Abstract

An integrated circuit package system includes: providing a base package of an elongated rectangular-box shape containing first electrical circuitry and including: forming a rectangular contact strip on and adjacent to a first end of the base package; and forming a base contact pad on and adjacent to a second end of the base package for connection to an electrical interconnect.

Claims (70)

1. A method for manufacturing an integrated circuit package system comprising:

providing a device casing;

providing a base package of an elongated rectangular-box shape, the base package containing first electrical circuitry and including:

forming a rectangular contact strip on and adjacent to a first end of the base package and

forming a base contact pad separated from the rectangular contact strip, on and adjacent to a second end of the base package opposite the first end, and for connection to an electrical interconnect;

positioning a stack package with a stack contact pad in contact with the electrical interconnect;

inserting the base package and the stack package in the device casing, the stack contact pad and the electrical interconnect clamped together between facing sides of the stack package and the base package; and

inserting a device cap having tapered cap retainers in the device casing.

2. The method as claimed in claim 1 wherein:

positioning the stack package includes positioning the stack package of a rectangular-box shape containing second electrical circuitry and including:

forming the stack contact pad on the stack package for connection to the electrical interconnect.

3. The method as claimed in claim 1 wherein

inserting the device cap includes inserting the device cap in the device casing to removably secure the base package relative to the stack package.

4. The method as claimed in claim 1 wherein

inserting the base package and the stack package includes placing the base package and the stack package in the device cap for removably holding the stack package relative to the base package.

5. The method as claimed in claim 1 wherein

inserting the base package and the stack package includes placing the base package and the stack package in the device cap for holding the stack package relative to the base package; and

inserting the device cap includes inserting the device cap in the device casing and removably retained therein.

6. A method for manufacturing an integrated circuit package system comprising:

providing a memory device casing;

providing a base package of an elongated rectangular-box shape, the base package containing first memory or controller circuitry and including:

forming rectangular contact strips on a first side of and adjacent to a first end of the base package and

forming base contact pads separated from the rectangular contact strips, on a first side of and adjacent to a second end of the base package opposite the first end, and connected to electrical interconnect

positioning a stack package with a stack contact pad in contact with the electrical interconnect;

inserting the base package and the stack package into the device casing, the stack contact pad and the electrical interconnect clamped together between facing sides of the stack package and the base package; and

inserting a memory device cap having tapered cap retainers in the memory device casing.

7. The method as claimed in claim 6 wherein:

positioning the stack package includes positioning the stack package of a rectangular-box shape containing second memory or controller circuitry and including:

forming the stack contact pads on the stack package connected to the electrical interconnects.

8. The method as claimed in claim 6 wherein:

inserting the memory device cap includes inserting the memory device cap in the memory device casing to removably secure the base package relative to the stack package.

9. The method as claimed in claim 6 wherein:

inserting the base package and the stack package includes placing the base package and the stack package in the memory device cap for removably holding the stack package relative to the base package.

10. The method as claimed in claim 6 wherein:

inserting the base package and the stack package includes placing the base package and the stack package in the memory device cap for holding the stack package relative to the base package; and

inserting the memory device cap includes inserting the memory device cap in a memory device casing and removably retained therein.

11. An integrated circuit package system comprising:

a device casing;

a base package of an elongated rectangular-box shape containing first electrical circuitry, the base package includes:

a rectangular contact strip on and adjacent to a first end of the base package and

a base contact pad separated from the rectangular contact strip, on and adjacent to a second end of the base package opposite the first end, and for connection to an electrical interconnect;

a stack package with a stack contact pad in contact with the electrical interconnect;

the base package and the stack package inserted in the device casing, the stack contact pad and the electrical interconnect clamped together between facing sides of the stack package and the base package; and

a device cap having tapered cap retainers in the device casing.

12. The system as claimed in claim 11 wherein:

the stack package includes the stack package having a rectangular-box shape containing second electrical circuitry and including:

the stack contact pad on the stack package for connection to the electrical interconnect.

13. The system as claimed in claim 11 wherein:

the device cap in the device casing includes the device cap to removably secure the base package relative to the stack package.

14. The system as claimed in claim 11 wherein:

the device cap includes the device cap for removably holding the stack package relative to the base package.

15. The system as claimed in claim 11 wherein:

the device cap includes the device cap for holding the stack package relative to the base package; and

the device casing includes the device casing for removably retaining the device cap therein.

16. The system as claimed in claim 11 wherein:

the first electrical circuitry includes first memory or controller.

17. The system as claimed in claim 16 further comprising:

a stack package of a rectangular-box shape containing second memory or controller circuitry and including:

stack contact pads on the stack package connected to the electrical interconnects.

18. The system as claimed in claim 16 further comprising:

a stack package of a rectangular-box shape containing second memory or controller circuitry electrically connected to the base package;

a memory device casing with the base package and the stack package electrically interconnected therein; and

a memory device cap in the memory device casing to removably secure the base package relative to the stack package.

19. The system as claimed in claim 16 further comprising:

a stack package of a rectangular-box shape containing second memory or controller circuitry electrically connected to the base package; and

a memory device cap for removably holding the stack package relative to the base package.

20. The system as claimed in claim 16 further comprising:

a stack package of a rectangular-box shape containing second memory or controller circuitry electrically connected to the base package;

a memory device cap for holding the stack package relative to the base package; and

a memory device casing for removably retaining the memory device cap therein.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0252. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 31, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0784 →
RELEASE OF SECURITY INTEREST Recorded Jun 8, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052864/0057 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0252 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2008
From: CHIN, CHEE KEONG; FENG, YU FENG; QU, WEN BIN
To: STATS CHIPPAC LTD.
Reel/Frame 021574/0271 →