IP Library Patent Application 12213871
Patent Application
App. No. 12/213,871

Simulation of program execution to detect problem such as deadlock

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Quick Facts
Patent No.
US None
App. No.
12/213,871
Abstract

A method of simulating software by use of a computer includes executing a program inclusive of a plurality of threads by a hardware model implemented as software on a software simulator, utilizing a monitor function of the simulator to collect information about accesses by monitoring accesses made by the plurality of threads with respect to resources provided in the hardware model, utilizing the monitor function to detect, from the collected information, overlapping accesses made to an identical resource area by two or more of the threads, and utilizing the monitor function to generate a message for warning of the overlapping accesses.

Claims (27)

1 . A method of simulating software by use of a computer, comprising:

executing a program inclusive of a plurality of threads by a hardware model implemented as software on a software simulator;

utilizing a monitor function of the simulator to collect information about accesses by monitoring accesses made by the plurality of threads with respect to resources provided in the hardware model;

utilizing the monitor function to detect, from the collected information, overlapping accesses made to an identical resource area by two or more of the threads; and

utilizing the monitor function to generate a message for warning of the overlapping accesses.

2 . The method as claimed in claim 1 , wherein the collected information includes an ID of an access-originating CPU, a value of a program counter of the CPU, an access address, an access size, an access type indicative of either read or write, and a cycle number of the simulator corresponding to a time of occurrence of an access.

3 . The method as claimed in claim 2 , wherein the step of detecting overlapping accesses detects the overlapping accesses by comparing the access address and the access size between accesses made by the plurality of threads.

4 . The method as claimed in claim 1 , further comprising organizing information about the detected overlapping accesses on a thread-specific basis.

5 . The method as claimed in claim 4 , further comprising:

creating a table indicative of relationship between the threads and the resources based on the information about the detected overlapping accesses organized on a thread-specific basis; and

detecting possible deadlock based on the table,

wherein the generating of the message generates a message for warning of the detected possible deadlock.

6 . The method as claimed in claim 4 , further comprising the step of detecting possible datarace based on the information about the detected overlapping accesses organized on a thread-specific basis, depending on whether the overlapping accesses are read access or write access, wherein the generating of the message generates a message for warning of the detected possible datarace.

7 . The method as claimed in claim 1 , wherein the generating of the message generates the message by including therein information indicative of a type of a problem caused by the overlapping accesses and information indicative of an address accessed by the overlapping accesses.

8 . The method as claimed in claim 1 , wherein an operating period of the hardware model is divided into a plurality of periods, and the information about accesses generated in a given one of the periods is collected in the given one of the periods, followed by generating the message in a period next following the given one of the period based on the collected information.

9 . A record medium having a program embodied therein for causing a computer to simulate software, the program comprising instructions causing the computer to perform the steps of:

executing a program inclusive of a plurality of threads by a hardware model implemented as software on a software simulator;

utilizing a monitor function of the simulator to collect information about accesses by monitoring accesses made by the plurality of threads with respect to resources provided in the hardware model;

utilizing the monitor function to detect, from the collected information, overlapping accesses made to an identical resource area by two or more of the threads; and

utilizing the monitor function to generate a message for warning of the overlapping accesses.

10 . An apparatus for simulating software, comprising:

a memory configured to store a simulator program inclusive of a hardware model implemented as software and a program inclusive of a plurality of threads that is to be executed on a hardware system corresponding to the hardware model; and

a computation unit to execute the simulator program stored in the memory to execute the program inclusive of a plurality of threads stored in the memory on the hardware model,

wherein the computation unit performs the steps of:

utilizing a monitor function of the simulator to collect information about accesses by monitoring accesses made by the plurality of threads with respect to resources provided in the hardware model;

utilizing the monitor function to detect, from the collected information, overlapping accesses made to an identical resource area by two or more of the threads; and

utilizing the monitor function to generate a message for warning of the overlapping accesses.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2015
From: SPANSION LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 035856/0527 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2008
From: TATSUOKA, MASATO; IKE, ATSUSHI
To: FUJITSU LIMITED
Reel/Frame 021198/0889 →