Passive equalizer with negative impedance to increase a gain
View Patent ↗A passive equalizer with negative impedance to increase a gain includes a first RC loop, a second RC loop, a cascade RL circuit and a cross-coupled inverter unit. Each of the first and the second RC loops includes a first resistor, a second resistor connected in series to the first resistor at a node to thereby form a resistor series, and a capacitor connected in parallel to the resistor series. The cascade RL circuit is connected between the RC loops and includes a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor. The cross-coupled inverter unit is connected in parallel to the RL circuit and connected between the RC loops for using the feature of negative impedance to obtain an excellent high-frequency gain.
1. A passive equalizer with negative impedance to increase a gain, comprising:
a first RC loop having a first resistor, a second resistor connected in series to the first resistor at a first node to thereby form a first resistor series, and a first capacitor connected in parallel to the first resistor series;
a second RC loop having a third resistor, a fourth resistor connected in series to the third resistor at a second node to thereby form a second resistor series, and a second capacitor connected in parallel to the second resistor series;
a cascade RL circuit connected between the first node and the second node and having a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor; and
a cross-coupled inverter unit connected in parallel to the cascade RL circuit and connected between the first node and the second node.
2. The passive equalizer as claimed in claim 1 , wherein the cross-coupled inverter unit comprises a first inverter and a second inverter.
3. The passive equalizer as claimed in claim 2 , wherein the first inverter has an input terminal connected to the first node and an output terminal connected to the second node, and the second inverter has an input terminal connected to the second node and an output terminal connected to the first node.
4. A passive equalizer with negative impedance to increase a gain, comprising:
a first RC loop having a first resistor, a second resistor connected in series to the first resistor at a first node to thereby form a first resistor series, and a first capacitor connected in parallel to the first resistor series, wherein two ends of the first RC loop function as differential positive input and output terminals respectively;
a second RC loop having a third resistor, a fourth resistor connected in series to the third resistor at a second node to thereby form a second resistor series, and a second capacitor connected in parallel to the second resistor series, wherein two ends of the second RC loop function as differential negative input and output terminals respectively;
a cascade RL circuit connected between the first node and the second node and having a fifth resistor, a sixth resistor and an inductor connected between the fifth resistor and the sixth resistor;
a first cross-coupled inverter unit connected in parallel to the cascade RL circuit and connected between the differential positive input terminal and the differential negative input terminal; and
a second cross-coupled inverter unit connected in parallel to the cascade RL circuit and connected between the differential positive output terminal and the differential negative output terminal.
5. The passive equalizer as claimed in claim 4 , wherein the first cross-coupled inverter unit comprises a first inverter and a second inverter.
6. The passive equalizer as claimed in claim 5 , wherein the first inverter has an input terminal connected to the differential positive input terminal and an output terminal connected to the differential negative input terminal, and the second inverter has an input terminal connected to the differential negative input terminal and an output terminal connected to the differential positive input terminal.
7. The passive equalizer as claimed in claim 4 , wherein the second cross-coupled inverter unit comprises a third inverter and a fourth inverter.
8. The passive equalizer as claimed in claim 7 , wherein the third inverter has an input terminal connected the differential positive output terminal and an output terminal connected to the differential negative output terminal, and the fourth inverter has an input terminal connected to the differential negative output terminal and an output terminal connected to the differential positive output terminal.
9. A passive equalizer with negative impedance to increase a gain, comprising:
a first RC loop having a first resistor with a first node and a second node at two ends, and a first capacitor connected between the first node and the second node;
a second RC loop having a second resistor with a third node and a fourth node at two ends, and a second capacitor connected between the third node and the fourth node;
a cascade RL circuit connected between the first node and the third node and having a third resistor, a fourth resistor and an inductor connected between the third resistor and the fourth resistor; and
a cross-coupled inverter unit connected in parallel to the cascade RL circuit and connected between the first node and the third node.
10. The passive equalizer as claimed in claim 9 , wherein the cross-coupled inverter unit comprises a first inverter and a second inverter.
11. The passive equalizer as claimed in claim 10 , wherein the first inverter has an input terminal connected to the first node and an output terminal connected to the third node, and the second inverter has an input terminal connected to the third node and an output terminal connected to the first node.
12. A passive equalizer with negative impedance to increase a gain, comprising:
a first RC loop having a first resistor with a first node and a second node at two ends and a first capacitor connected between the first node and the second node;
a second RC loop having a second resistor with a third node and a fourth node at two ends and a second capacitor connected between the third node and the fourth node;
a cascade RL circuit connected between the first node and the third node and having a third resistor, a fourth resistor and an inductor connected between the third resistor and the fourth resistor; and
a cross-coupled inverter unit connected in parallel to the cascade RL circuit and connected between the second node and the fourth node.
13. The passive equalizer as claimed in claim 12 , wherein the cross-coupled inverter unit comprises a first inverter and a second inverter.
14. The passive equalizer as claimed in claim 13 , wherein the first inverter has an input terminal connected to the second node and an output terminal connected to the fourth node, and the second inverter has an input terminal connected to the fourth node and an output terminal connected to the second node.