IP Library Granted Patent US 7,888,181
Granted Patent B2
US 7,888,181 · App. 12/235,000 · Granted Feb 15, 2011

Method of forming a wafer level package with RDL interconnection over encapsulant between bump and semiconductor die

Assignee: STATS ChipPAC, Ltd.
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Quick Facts
Patent No.
US 7,888,181
App. No.
12/235,000
Granted
Feb 15, 2011
Kind
B2
Abstract

A semiconductor device is made by providing a metal substrate for supporting the semiconductor device. Solder bumps are connected to the substrate. In one embodiment, a conductive material is deposited over the substrate and is reflowed to form the solder bumps. A semiconductor die is mounted to the substrate using a die attach adhesive. The semiconductor die has a plurality of contact pads formed over a surface of the semiconductor die. An encapsulant material is deposited over the solder bumps and the semiconductor die. The encapsulant is etched to expose the contact pads of the semiconductor die. A first redistribution layer (RDL) is formed over the encapsulant to connect each contact pad of the semiconductor die to one of the solder bumps. The substrate is removed to expose the die attach adhesive and a bottom surface of the solder bumps.

Claims (51)

1. A method of making a semiconductor device, comprising:

providing a metal substrate for supporting the semiconductor device;

connecting solder bumps to the substrate;

mounting a semiconductor die to the substrate using a die attach adhesive, the semiconductor die having a plurality of contact pads formed over a surface of the semiconductor die;

depositing encapsulant over the solder bumps and the semiconductor die;

etching the encapsulant to expose the contact pads of the semiconductor die;

forming a first redistribution layer (RDL) over the encapsulant to connect each contact pad of the semiconductor die to one of the solder bumps; and

removing the substrate to expose the die attach adhesive and a bottom surface of the solder bumps.

2. The method of claim 1 , wherein removing the substrate includes chemical-mechanical polishing (CMP), wet etching, or plasma etching.

3. The method of claim 1 , wherein the substrate includes a plurality of solder capture dents.

4. The method of claim 1 , wherein the solder bumps are configured in a plurality of staggered rows around the semiconductor die.

5. The method of claim 1 , including forming a second RDL over a back surface of the semiconductor device opposite the first RDL after removing the substrate.

6. The method of claim 1 , wherein depositing encapsulant over the solder bumps and the semiconductor die includes controlling the flow of the encapsulant to expose a top portion of the plurality of solder bumps.

7. The method of claim 1 , wherein the substrate includes a copper (Cu) material.

8. A method of making a semiconductor device, comprising:

providing a substrate for supporting the semiconductor device;

connecting a solder bump to the substrate;

mounting a semiconductor die to the substrate, the semiconductor die having a contact pad formed over a surface of the semiconductor die;

depositing encapsulant over the solder bump and the semiconductor die;

etching the encapsulant to expose the contact pad of the semiconductor die;

forming a first redistribution layer (RDL) over the encapsulant to connect the contact pad of the semiconductor die to the solder bump; and

removing the substrate to expose a bottom surface of the solder bump.

9. The method of claim 8 , wherein removing the substrate includes chemical-mechanical polishing (CMP), wet etching, or plasma etching.

10. The method of claim 8 , wherein the substrate includes a plurality of solder capture dents.

11. The method of claim 8 , wherein the substrate includes a copper (Cu) material.

12. The method of claim 8 , including forming a second RDL over a back surface of the semiconductor device opposite the first RDL after removing the substrate.

13. The method of claim 8 , wherein depositing encapsulant over the solder bump and the semiconductor die includes controlling the flow of the encapsulant to expose a top portion of the solder bump.

14. A method of making a semiconductor device, comprising:

providing a substrate for supporting the semiconductor device;

connecting a conductive bump to the substrate;

mounting a semiconductor die to the substrate;

depositing encapsulant over the conductive bump and the semiconductor die;

removing a portion of the encapsulant to expose a contact pad of the semiconductor die;

forming a redistribution layer (RDL) over the encapsulant to connect the contact pad of the semiconductor die to the conductive bump; and

removing the substrate to expose a bottom surface of the conductive bump.

15. The method of claim 14 , wherein removing the substrate includes chemical-mechanical polishing (CMP), wet etching, or plasma etching.

16. The method of claim 14 , wherein the substrate includes a plurality of solder capture dents.

17. The method of claim 14 , wherein depositing encapsulant over the conductive bump and the semiconductor die includes controlling the flow of the encapsulant to expose a top portion of the conductive bump.

18. The method of claim 14 , wherein the substrate includes a copper (Cu) material.

19. A method of making a semiconductor device, comprising:

providing a substrate for supporting the semiconductor device;

forming a bump over the substrate;

mounting a semiconductor die to the substrate;

depositing an encapsulant over the bump and semiconductor die;

removing a portion of the encapsulant to expose a contact pad of the semiconductor die;

forming a redistribution layer (RDL) over the encapsulant to connect the contact pad of the semiconductor die to the bump; and

removing the substrate to expose a bottom surface of the bump.

20. The method of claim 19 , wherein removing the substrate includes chemical-mechanical polishing (CMP), wet etching, or plasma etching.

21. The method of claim 19 , wherein the substrate includes a plurality of capture dents.

22. The method of claim 19 , wherein depositing encapsulant over the bump and the semiconductor die includes controlling the flow of the encapsulant to expose a top portion of the bump.

23. The method of claim 19 , wherein the substrate includes a copper (Cu) material.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVER SHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 064783 FRAME 0896. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE CHANGE OF NAME. Recorded Sep 22, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065015/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. PREVIOUSLY RECORDED ON REEL 038378 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 14, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064962/0123 →
CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0292) Recorded Aug 30, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE.LTE.
Reel/Frame 064783/0896 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0292 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2008
From: CAMACHO, ZIGMUND R.; TAY, LIONEL CHIEN HUI; BATHAN, HENRY D.; PUNZALAN, JEFFREY D.
To: STATS CHIPPAC, LTD.
Reel/Frame 021564/0911 →
Continuity (1)
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