IP Library Granted Patent US 7,777,320
Granted Patent B2
US 7,777,320 · App. 12/236,437 · Granted Aug 17, 2010

Quad flat pack in quad flat pack integrated circuit package system

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Quick Facts
Patent No.
US 7,777,320
App. No.
12/236,437
Granted
Aug 17, 2010
Kind
B2
Abstract

An integrated circuit package system includes: providing a base package having a first integrated circuit with an inner lead on a periphery thereof and connected thereto with interconnects, and the inner lead partially encapsulated by an inner encapsulation; mounting an outer lead on the periphery of the base package; mounting a second integrated circuit above the base package and connected to the outer lead with the interconnects; and partially encapsulating, the base package and the outer leads with an outer encapsulation leaving a bottom surface of the inner lead and a bottom surface of the outer lead exposed.

Claims (40)

1. An integrated circuit package system comprising:

providing a base package having a first integrated circuit with an inner lead on a periphery thereof and connected thereto with bond wires, and the inner lead partially encapsulated by an inner encapsulation, and a lead extension extending upward from the inner lead;

connecting a heat sink above the first integrated circuit to the inner lead with the lead extension;

mounting an outer lead on the periphery of the base package;

mounting a second integrated circuit above the base package and connected to the outer lead with the bond wires; and

partially encapsulating, the base package and the outer leads with an outer encapsulation leaving a bottom surface of the inner lead and a bottom surface of the outer lead exposed.

2. The system as claimed in claim 1 further comprising:

mounting the first integrated circuit above a die pad.

3. The system as claimed in claim 1 further comprising:

etching the outer lead to form a half-etched portion.

4. The system as claimed in claim 1 further comprising:

mounting a third integrated circuit above the second integrated circuit and connected thereto with a solder bump.

5. The system as claimed in claim 1 further comprising:

providing a process tape and mounting the base package thereto.

6. The system as claimed in claim 1 wherein:

providing the base package includes providing a heat sink support extending downward from the heat sink and a lead extension extending upward from the inner lead and connecting the heat sink the lead extension to the heat sink support.

7. The system as claimed in claim 1 wherein:

mounting the second integrated circuit includes attaching the second integrated circuit with a die attach adhesive.

8. The system as claimed in claim 1 wherein:

encapsulating the outer lead partially with the outer encapsulation includes exposing a side portion and a portion of a top surface of the outer lead.

9. An integrated circuit package system comprising:

a base package having a first integrated circuit with an inner lead on a periphery thereof and connected thereto with bond wires, and the inner lead partially encapsulated by an inner encapsulation and further connected to a heat sink above the first integrated circuit;

a lead extension extending upward from the inner lead and connecting the heat sink to the inner lead;

an outer lead mounted on the periphery of the base package;

a second integrated circuit mounted above the base package and connected to the outer lead with the bond wires; and

an outer encapsulation partially encapsulating, the base package and the outer lead with leaving a bottom surface of the inner lead and a bottom surface of the outer lead exposed.

10. The system as claimed in claim 9 further comprising:

the first integrated circuit mounted above a die pad.

11. The system as claimed in claim 9 further comprising:

a half-etched portion in the outer lead.

12. The system as claimed in claim 9 further comprising:

a third integrated circuit mounted above the second integrated circuit and connected thereto with a solder bump.

13. The system as claimed in claim 9 further comprising:

a bottom surface of the inner encapsulation exposed from the outer encapsulation.

14. The system as claimed in claim 9 further comprising:

a heat sink support extending downward from the heat sink and a lead extension extending upward from the inner lead and the heat sink support is connected to the lead extension.

15. The system as claimed in claim 9 further comprising:

a die attach adhesive attaching the second integrated circuit above the base package.

16. The system as claimed in claim 9 wherein:

the outer encapsulation partially encapsulates the outer lead exposing a side portion and a portion of a top surface of the outer lead.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0309. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 11, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0767 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052924/0007 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0309 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2008
From: MERILO, DIOSCORO A.; DIMAANO, ANTONIO B., JR.
To: STATS CHIPPAC LTD.
Reel/Frame 021672/0451 →