Wafer grounding methodology
An apparatus for increasing electric conductivity to a wafer substrate, when exposed to electron beam irradiation, is disclosed. More specifically, a methodology to breakdown the insulating layer on wafer backside is provided to significantly reduce the damage on the wafer backside while proceeding with the grounding process.
1. An apparatus for increasing electric conductivity to a wafer substrate, comprising:
an electrostatic chuck to hold a wafer, the electrostatic chuck having one or more pin housing holes, the electrostatic chuck being coupled to one or more capacitors;
one or more of electric contact pins individually corresponding to the pin housing holes, the one or more pins being coupled to one or more resistors; and
an electric pulse power supply, wherein the electric contact pins, the electrostatic chuck, and the electric pulse power supply are designed to resolve backside damage to the a wafer substrate.
2. The apparatus as claimed in claim 1 , wherein the electric pulse power supply outputs unidirectional electric pulse voltage.
3. The apparatus as claimed in claim 2 , wherein the unidirectional electric pulse voltage is either one or a series of positive pulse voltages.
4. The apparatus as claimed in claim 2 , wherein the unidirectional electric pulse voltage is either one or a series of negative pulse voltages.
5. The apparatus as claimed in claim 1 , wherein the electrostatic chuck and the electric pulse power supply is electrically connected to a stage ground.
6. An apparatus for decreasing damage to a wafer substrate in E-beam inspecting the wafer substrate, comprising:
at least one electric contact pin, in at least one pin housing hole of an electrostatic chuck, contacting to backside of the wafer substrate;
an electric pulse power supply for providing pulse to the at least one electric contact pin; and
at least one resistor coupled between the at least one electric contact pin and the electric pulse power supply.
7. The apparatus as claimed in claim 6 , further comprising at least one capacitor coupled to the electrostatic chuck.
8. The apparatus as claimed in claim 6 , wherein the electric pulse power supply outputs unidirectional electric pulse voltage.
9. The apparatus as claimed in claim 8 , wherein the unidirectional electric pulse voltage is either one or a series of positive pulse voltages.
10. The apparatus as claimed in claim 8 , wherein the unidirectional electric pulse voltage is either one or a series of negative pulse voltages.
11. The apparatus as claimed in claim 6 , the electrostatic chuck and the electric pulse power supply is electrically connected to a stage ground.
12. A method for increasing electric conductivity to a wafer substrate, comprising:
providing a circuit to at least one electric contact pin in at least one pin housing hole of an electrostatic chuck, wherein the circuit includes an electric pulse power supply, and at least one resistor coupled between the at least one electric contact pin and the electric pulse power supply, wherein the at least one electric contact pin contacts to backside of the wafer substrate; and
providing unidirectional electric pulse voltage to the at least one electric contact pin, such that a zapping mark less than one micrometer is formed at the backside of the wafer substrate.
13. The method as claimed in claim 12 , wherein the electrostatic chuck couples to at least one capacitor.
14. The method as claimed in claim 12 , wherein the electric pulse power supply outputs unidirectional electric pulse voltage.
15. The method as claimed in claim 14 , wherein the unidirectional electric pulse voltage is either one or a series of positive pulse voltages.
16. The method as claimed in claim 14 , wherein the unidirectional electric pulse voltage is either one or a series of negative pulse voltages.
17. The method as claimed in claim 13 , the electrostatic chuck and the electric pulse power supply is electrically connected to a stage ground.