IP Library Granted Patent US 7,911,038
Granted Patent B2
US 7,911,038 · App. 12/306,987 · Granted Mar 22, 2011

Wiring board, semiconductor device using wiring board and their manufacturing methods

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Quick Facts
Patent No.
US 7,911,038
App. No.
12/306,987
Granted
Mar 22, 2011
Kind
B2
Abstract

A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Claims (23)

1. A wiring board, comprising:

an insulating layer;

a plurality of wiring layers formed in such a way as to be insulated from each other by said insulating layer; and

a plurality of vias formed in said insulating layer to connect said wiring layers, wherein said wiring layers include a surface wiring layer, which is formed in one surface of said insulating layer, said surface wiring layer comprising:

a first metal film exposed from said one surface and having side surfaces that at least partially contact said insulating layer; and

a second metal film embedded in said insulating layer and stacked symmetrically and directly onto said first metal film, and edges of said first metal film coincide with edges of said second metal film or project from the edges of said second metal film in a direction in which said second metal film spreads.

2. The wiring board according to claim 1 , wherein an external surface of said first metal film is located at a position recessed from said one surface of said insulating layer.

3. The wiring board according to claim 2 , wherein a recess in said insulating layer at which said first metal film is formed has side surfaces that positionally coincide with the edges of said first metal film.

4. The wiring board according to claim 2 , wherein a recess in said insulating layer at which said first metal film is formed has side surfaces that are located more outward than the edges of said first metal film.

5. The wiring board according to claim 1 , wherein said first metal film and said second metal film are made of the same material.

6. The wiring board according to claim 1 , wherein said first metal film is made of one metal selected from the group consisting of gold, silver, nickel, copper, aluminum, palladium, platinum, rhodium, tin, and solder material, or plural metals selected from said group and stacked together.

7. The wiring board according to claim 1 , wherein said second metal film is made of one metal selected from the group consisting of gold, silver, nickel, copper, aluminum, palladium, platinum, rhodium, tin, and solder material, or plural metals selected from said group and stacked together.

8. The wiring board according to claim 1 , wherein said via is not connected to a part of said surface wiring layer.

9. The wiring board according to claim 1 , wherein a metal frame is provided on either surface or both surfaces of said insulating layer.

10. The wiring board according to claim 1 , wherein a second electrode is formed on a surface of said insulating layer opposite to said one surface, a part of said surface wiring layer is used as a first electrode, and a solder resist is formed on either surface or both surfaces of said insulating layer, said solder resist having an opening to expose all or a part of said first electrode or said second electrode.

11. A semiconductor device, wherein at least one semiconductor element is connected to said wiring board according to claim 1 .

12. The semiconductor device according to claim 11 , wherein said at least one semiconductor element and said wiring board are connected by at least one of flip-chip bonding and wire bonding.

13. A wiring board, comprising an etching barrier layer and a supporting substrate that are formed on said one surface of said wiring board according to claim 1 , in an order in which said etching barrier layer is on said one surface.

14. The wiring board according to claim 13 , wherein said etching barrier layer is formed on an entire surface of said one surface.

15. The wiring board according to claim 13 , wherein edges of said etching barrier layer project from the edges of said first metal film in a direction in which said first metal film spreads, or positionally coincide with the edges of said first metal film.

16. The wiring board according to claim 13 , wherein said supporting substrate is made of a conductive material, or a composite material formed of a conductive material stacked on a surface of an insulating material.

17. The wiring board according to claim 13 , wherein said etching barrier layer is made of a material that is different from said conductive material of said supporting substrate and a material of said first metal film.

18. The wiring board according to claim 13 , wherein a second electrode is formed on a surface of said insulating layer opposite to said one surface, and a solder resist is formed to have an opening to expose all or a part of said second electrode.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2013
From: NEC CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 030783/0873 →
CHANGE OF NAME Recorded Oct 28, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025214/0678 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2009
From: KIKUCHI, KATSUMI; YAMAMICHI, SHINTARO; MURAI, HIDEYA; FUNAYA, TAKUO; MORI, KENTARO; MAEDA, TAKEHIKO; HONDA, HIROKAZU; OGAWA, KENTA; TSUKANO, JUN
To: NEC CORPORATION; NEC ELECTRONICS CORPORATION
Reel/Frame 022158/0470 →