IP Library Granted Patent US 8,110,871
Granted Patent B2
US 8,110,871 · App. 12/323,391 · Granted Feb 7, 2012

Semiconductor device with recess and fin structure

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Quick Facts
Patent No.
US 8,110,871
App. No.
12/323,391
Granted
Feb 7, 2012
Kind
B2
Abstract

The semiconductor device includes an active region, a recess, a Fin channel region, a gate insulating film, and a gate electrode. The active region is defined by a device isolation structure formed in a semiconductor substrate. The recess is formed by etching the active region and its neighboring device isolation structure using an island shaped recess gate mask as an etching mask. The Fin channel region is formed on the semiconductor substrate at a lower part of the recess. The gate insulating film is formed over the active region including the Fin channel region and the recess. The gate electrode is formed over the gate insulating film to fill up the Fin channel region and the recess.

Claims (18)

1. A semiconductor device comprising:

an active region of a semiconductor substrate, the active region being elongated in a first direction;

a recess formed in a channel region of the active region so that a width in the first direction of a lower part of the recess is greater than that of an upper part of the recess;

a device isolation structure defining the active region, wherein the device isolation structure comprises opposing etched portions extending in a second direction, substantially orthogonal to the first direction, from the lower part of the recess, each of the opposing etched portions extending to a depth lower than an upper surface of the active region in the recess, and wherein the lower part of the recess has a width in the second direction that is greater than a width of the upper part of the recess in the second direction, and wherein a minimum width of the upper part of the recess in the second direction is greater than a maximum width of the active region in the recess;

a gate insulating film formed over portions of the active region in the recess; and

a gate electrode formed over portions of the gate insulating film and filling the recess and the etched portions of the device isolation structure.

2. The semiconductor device according to claim 1 , wherein the opposing etched portions extend to a depth lower than the upper surface of the active region in the recess such that the active region at the bottom of the recess protrudes in an upward fin shape into the recess.

3. The semiconductor device according to claim 1 , wherein the recess comprises:

an upper part with a vertical profile having a first width in the first direction; and

a lower part with a curved profile adjacent and immediately below the first part having a second width in the first direction larger than the first width.

4. The semiconductor device according to claim 3 , wherein the curved profile in the first direction of the lower part of the recess is elliptical or circular.

5. The semiconductor device according to claim 3 , wherein the opposing etched portions extend to a depth lower than the upper surface of the active region in the recess such that the active region at the bottom of the lower part of the recess protrudes in an upward fin shape into the lower part of the recess.

6. The semiconductor device according to claim 1 , wherein a minimum width of the recess in the second direction is greater than a maximum width in the second direction of the gate insulating film over active region.

7. The semiconductor device according to claim 1 , wherein the device isolation structure comprises a stacked structure of a first liner oxide film, a liner nitride film, and a filling oxide film.

8. The semiconductor device according to claim 1 , wherein the device isolation structure comprises a stacked structure of a first and second oxide films, each having an etching rate different from the other.

9. The semiconductor device according to claim 1 , wherein the width of the upper part of the recess in the second direction is greater than the maximum width of the active region in recess by a distance 2E, where 0<E< 1 / 2 F, and a distance F is the distance between neighboring gate regions in the first direction.

10. The semiconductor device according to claim 1 , wherein the gate insulating film is selected from the group consisting of an oxide film, a nitride film, and combination thereof.

11. The semiconductor device according to claim 1 , wherein the gate electrode is selected from the group consisting of a polysilicon film, a titanium nitride film, a tungsten film, and combinations thereof.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE CONVEYING PARTY'S NAME PREVIOUSLY RECORDED ON REEL 058297 FRAME 0853. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Aug 28, 2023
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