IP Library Patent Application 12347800
Patent Application
App. No. 12/347,800

SEMICONDUCTOR PACKAGE SUBSTRATE WITH METAL BUMPS

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Quick Facts
Patent No.
US None
App. No.
12/347,800
Abstract

An apparatus and method of making a package substrate with metal bumps is presented. The package substrate comprises a substrate base and a plurality of metal bumps which are formed on the substrate base. A microelectronic die may thereafter be attached to the package substrate. Also presented is a method for attaching the package substrate to a printed circuit board (PCB).

Claims (51)

1 . A package substrate to be attached to a microelectronic die, the package substrate comprising:

a substrate base; and

a plurality of copper (Cu) bumps formed on a first side of the substrate base, wherein a second side of the substrate is to be attached to a microelectronic die, the second side of the substrate opposite the first side.

2 . The package substrate of claim 1 , wherein the plurality of Cu bumps are pillar-shaped.

3 . The package substrate of claim 1 , wherein the plurality of Cu bumps further comprises at least one metal selected from the group consisting of aluminum, nickel, gold, and alloys thereof.

4 . The package substrate of claim 3 , wherein the at least one metal is electroplated on the plurality of Cu bumps.

5 . The package substrate of claim 1 , further comprising:

a capping layer formed on an end of each bump of the plurality of Cu bumps.

6 . The package substrate of claim 1 , wherein a height of the plurality of Cu bumps is within a range of 25 to 100 microns.

7 . The package substrate of claim 1 , further comprising:

a polymer layer.

8 . A method of making a microelectronic package including a package substrate and a microelectronic die, the method comprising:

forming a substrate base;

forming a plurality of copper (Cu) bumps on a first side of the substrate base, wherein the package substrate comprises the plurality of Cu bumps and substrate base; and

after forming the plurality of Cu bumps on the substrate base, attaching a microelectronic die to a second side of the substrate base, the second side opposite the first side of the substrate base.

9 . The method of claim 8 , wherein the forming of the plurality of Cu bumps comprises:

forming a polymer layer on the first side of a substrate;

forming a plurality of trenches within the polymer layer, the trenches extending to the substrate base; and

depositing a conductive material comprising Cu within the plurality of trenches to form the plurality of Cu bumps.

10 . The method of claim 9 , wherein the depositing of conductive material within the plurality of trenches is by electroplating.

11 . The method of claim 9 , wherein the conductive material further comprises at least one metal selected from the group consisting of aluminum, nickel, gold, and alloys thereof.

12 . The method of claim 9 , further comprising:

plating at least one metal on at least a portion of each bump of the plurality of Cu bumps, the at least one metal selected from the group consisting of aluminum, nickel, gold, and alloys thereof.

13 . The method of claim 9 , further comprising:

depositing a molding compound on the second side of the substrate base, the microelectronic die within the molding compound; and

removing the polymer layer to expose the plurality of Cu bumps.

14 . The method of claim 13 , further comprising:

forming a capping layer of solder on an end of each bump of the plurality of Cu bumps.

15 . The package substrate of claim 14 , wherein the capping layer of solder is a metal alloy and comprised of at least one combination of metals selected from the group consisting of AgSn, PbSn, SnAgCu, SnAgBi, AuSn, In and InSn.

16 . The method of claim 8 , wherein a height of the plurality of Cu bumps is within a range of 25 to 100 microns.

17 . The method of attaching a package substrate to contacts on a printed circuit board (PCB), the method comprising:

depositing a solder material between the contacts on the PCB and a plurality of copper (Cu) bumps formed on a first side of a substrate base, wherein the package substrate is comprised of the plurality of Cu bumps and substrate base; and

attaching the package substrate to the contacts of the PCB so that ends of the plurality of Cu bumps are connected to the contacts of the PCB with the deposit material between.

18 . The method of 17 , wherein the solder material is deposited on the ends of the plurality of Cu bumps.

19 . The method of 17 , wherein the solder material is deposited on the contacts of the PCB.

20 . The method of 17 , wherein the solder material is deposited on the contacts of the PCB and on the ends of the plurality of Cu bumps.

21 . The method of claim 17 , wherein the attaching of the package substrate to the contacts of the PCB comprises:

heating the solder material to a temperature greater than 150° C. so that the solder material melts; and

cooling the solder material so that the solder material solidifies.

22 . The method of claim 17 , wherein a height of the plurality of Cu bumps is within a range of 25 to 100 microns.

23 . The method of attaching a package substrate to contacts of a printed circuit board (PCB), the method comprising:

forming an adhesive layer between the contacts of the PCB and a plurality of copper (Cu) bumps formed on a first side a substrate base, wherein the package substrate comprises the plurality of Cu bumps and substrate base; and

applying pressure to the package substrate and PCB so that an end of each Cu bump is pressed into the adhesive layer and coupling to the contacts of the PCB.

24 . The method of claim 23 , further comprising:

curing the adhesive layer.

25 . The method of claim 23 , wherein the adhesive layer is an anisotropic conductive film or paste.

26 . The method of claim 23 , wherein the adhesive layer is a non-conductive film or paste.

27 . The method of claim 23 , wherein the adhesive layer is formed on the contacts of the PCB.

28 . The method of claim 23 , wherein the adhesive layer is formed on the end of each Cu bump.

29 . The method of claim 23 , wherein the adhesive layer is formed on the contacts of the PCB and on the end of each Cu bump.

30 . The method of claim 23 , wherein a height of the plurality of Cu bumps is within a range of 25 to 100 microns.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NUMONYX B.V.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 027126/0176 →
CORRECTIVE ASSIGNMENT TO CORRECT NAME OF ASSIGNEE PREVIOUSLY RECORDED AT REEL/FRAME 024573/0901. (ATTACHED) Recorded Sep 9, 2010
From: ADIMULA, RAVIKUMAR; YIM, MYUNG JIN
To: NUMONYX B.V.
Reel/Frame 025052/0764 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2010
From: ADIMULA, RAVIKUMAR; YIM, MYUNG JIN
To: INTEL CORPORATION
Reel/Frame 024573/0901 →