Robust shallow trench isolation structures and a method for forming shallow trench isolation structures
In a semiconductor substrate, a shallow trench isolation structure having a dielectric material disposed in voids of a trench-fill material and a method for forming the shallow trench isolation structure. The voids may be formed during a wet clean process after the dielectric material is formed in the trench. A conformal silicon nitride layer is formed over the substrate and in the voids. After removal of the silicon nitride layer, the voids are at least partially filled by the silicon nitride material.
1. An integrated circuit structure, comprising:
a semiconductor layer;
a device isolation structure formed in the semiconductor layer, the device isolation structure comprising a first dielectric material disposed within a trench in the semiconductor layer, wherein voids are present in the first dielectric material proximate sidewalls of the trench; and
a first remnant segment of a second dielectric material located within the voids and a second remnant segment of the second dielectric material located on at least one side of the device isolation structure that extends above the semiconductor layer, wherein the first remnant segment and the second remnant segment are spaced apart.
2. The semiconductor device of claim 1 wherein the second dielectric material comprises silicon nitride, silicon oxynitride or silicon carbide.
3. The semiconductor device of claim 1 wherein an upper region of the first dielectric material comprises an upper surface, and wherein the second dielectric material is disposed on the upper surface.
4. The semiconductor device of claim 1 further including a material layer located over the first and second remnant segments and the device isolation structure.
5. The semiconductor device of claim 1 wherein the second remnant segment is located on the top side of the device isolation structure.