IP Library Granted Patent US 7,642,549
Granted Patent B2
US 7,642,549 · App. 12/407,068 · Granted Jan 5, 2010

Phase change memory cells delineated by regions of modified film resistivity

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Quick Facts
Patent No.
US 7,642,549
App. No.
12/407,068
Granted
Jan 5, 2010
Kind
B2
Abstract

A Phase Change Memory (PCM) cell structure comprises both a lower electrode composed of a PCM layer and a conductive encapsulating upper electrode layer. The PCM layer is protected from damage by the conductive encapsulating layer. Electrical isolation between adjacent PCM cells is provided by high electrical resistance regions which were formed by modifying the conductivity of both the PCM layer and the conductive encapsulating upper electrode layer subsequent to deposition thereof.

Claims (36)

1. A Phase Change Memory (PCM) device comprising:

a substrate having an upper surface and including a set of electrical via conductors formed therein having exposed top surfaces;

a PCM material layer formed on said upper surface in electrical contact with said exposed top surfaces of said via conductors;

an encapsulating layer composed of an electrically conductive material formed on top of said PCM material layer;

a set of PCM cells formed by portions of said encapsulating layer and portions of said PCM material layer in contact with said top surface of said electrical conductors; and

said PCM cells being separated by high electrical resistance, modified regions of said PCM material layer and high electrical resistance, modified regions of said encapsulating layer.

2. The Phase Change Memory (PCM) device of claim 1 wherein:

said encapsulating layer is composed of material selected from the group consisting of conductors and semiconductor materials; and

said PCM material layer is composed of a chalcogenide material.

3. The Phase Change Memory (PCM) device of claim 1 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer comprise ion implanted and annealed regions.

4. The Phase Change Memory (PCM) device of claim 3 wherein said ions are selected from the group consisting of oxygen, nitrogen, and carbon.

5. The Phase Change Memory (PCM) device of claim 2 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer comprise oxygen ion implanted and annealed regions.

6. The Phase Change Memory (PCM) device of claim 5 wherein said ions are selected from the group consisting of oxygen, nitrogen, and carbon.

7. The Phase Change Memory (PCM) device of claim 1 wherein a central via which serves as a pass-through contact is juxtaposed with a pair of said PCM cells.

8. The Phase Change Memory (PCM) device of claim 1 wherein a central via which serves as a pass-through contact is juxtaposed with a pair of said PCM cells with said central via including via conductors in series with unmodified regions of said PCM material layer and unmodified regions of said encapsulating layer.

9. A Phase Change Memory (PCM) device comprising:

a dielectric layer having an upper surface;

a set of electrical via conductors extending through said dielectric layer to said upper surface;

each of said electrical via conductors having top surfaces;

a PCM material layer formed on said upper surface in electrical contact with said top surfaces of said via conductors;

an encapsulating layer composed of an electrically conductive material formed on top of said PCM material layer;

a set of PCM cells formed by portions of said encapsulating layer and portions of said PCM material layer in contact with said top surface of said via conductors; and

said PCM cells being separated by high electrical resistance, modified regions of said PCM material layer and high electrical resistance, modified regions of said encapsulating layer.

10. The Phase Change Memory (PCM) device of claim 9 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer comprise oxygen ion implanted and annealed regions.

11. The Phase Change Memory (PCM) device of claim 9 wherein said high electrical resistance regions of said PCM material layer and high electrical resistance regions of said encapsulating layer comprise insulating material.

12. The Phase Change Memory (PCM) device of claim 9 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer have been implanted with ions.

13. The Phase Change Memory (PCM) device of claim 12 wherein said high electrical resistance regions of said PCM material layer and high electrical resistance regions of said encapsulating layer comprise insulating material.

14. The Phase Change Memory (PCM) device of claim 9 wherein:

said encapsulating conductive material layer is composed of material selected from the group consisting of conductors and semiconductor materials; and

said PCM material layer is composed of a chalcogenide material.

15. The Phase Change Memory (PCM) device of claim 14 wherein said ions are selected from the group consisting of oxygen, nitrogen, and carbon.

16. The Phase Change Memory (PCM) device of claim 14 wherein said high electrical resistance regions of said PCM material layer and high electrical resistance regions of said encapsulating layer comprise insulating material.

17. The Phase Change Memory (PCM) device of claim 14 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer have been implanted with ions.

18. The Phase Change Memory (PCM) device of claim 17 wherein said high electrical resistance regions of said PCM material layer and high electrical resistance regions of said encapsulating layer comprise insulating material.

19. The Phase Change Memory (PCM) device of claim 17 wherein said ions are selected from the group consisting of oxygen, nitrogen, and carbon.

20. The Phase Change Memory (PCM) device of claim 19 wherein said high electrical resistance regions of said PCM material layer and said high electrical resistance regions of said encapsulating layer comprise oxygen ion implanted and annealed regions.

Assignments (11)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052888 FRAME 0177 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0712 →
SECURITY INTEREST Recorded Jun 9, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052888/0177 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2020
From: HGST NETHERLANDS B.V
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 052783/0631 →
CONFIRMATORY ASSIGNMENT Recorded Jan 21, 2016
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: HGST NETHERLANDS B.V.
Reel/Frame 037569/0153 →