IP Library Granted Patent US 7,985,970
Granted Patent B2
US 7,985,970 · App. 12/418,816 · Granted Jul 26, 2011

High voltage low current surface-emitting LED

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Quick Facts
Patent No.
US 7,985,970
App. No.
12/418,816
Granted
Jul 26, 2011
Kind
B2
Abstract

A monolithic LED chip is disclosed comprising a plurality of junctions or sub-LEDs (“sub-LEDs”) mounted on a submount. The sub-LEDs are serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of serially interconnected sub-LEDs and the junction voltage of the sub-LEDs. Methods for fabricating a monolithic LED chip are also disclosed with one method comprising providing a single junction LED on a submount and separating the single junction LED into a plurality of sub-LEDs. The sub-LEDs are then serially interconnected such that the voltage necessary to drive the sub-LEDs is dependent on the number of the serially interconnected sub-LEDs and the junction voltage of the sub-LEDs.

Claims (17)

1. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount, wherein said sub-LEDs are formed from a single junction LED;

an insulator layer between said submount and said sub-LEDs; and

electrically conductive and electrically insulating features serially interconnecting said sub-LEDs such that an electrical signal applied to said serially interconnected sub-LEDs along said electrically conductive features spreads to said serially interconnected sub-LEDs, wherein said electrically conductive features comprises a plurality of connector traces serially interconnecting said sub-LEDs.

2. The LED chip of claim 1 , wherein the voltage necessary to drive said sub-LEDs is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

3. The LED chip of claim 1 , wherein said sub-LEDs are formed from a single junction LED by removing portions of said single junction LED.

4. The LED chip of claim 3 , wherein said sub-LEDs are formed from a single junction LED by isolation implants.

5. The LED chip of claim 3 , wherein the active area utilization ratio is greater than 50%.

6. The LED chip of claim 3 , wherein the active area utilization ratio of said single junction LED active region is greater than 75%.

7. The LED chip of claim 1 , wherein said sub-LEDs are flip-chip mounted on said submount.

8. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount;

a plurality of bottom contacts, each of which is between one of said sub-LEDs and said submount;

connector traces serially interconnecting said sub-LEDs; and

insulating features to insulate portions of said sub-LEDs from said connector traces.

9. The LED chip of claim 8 , wherein said the drive voltage is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

10. The LED chip of claim 8 , further comprising an insulating layer between said sub-LEDs and said submount.

Assignments (5)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 057017/0311 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2009
From: IBBETSON, JAMES; HEIKMAN, STEN
To: CREE, INC.
Reel/Frame 022858/0156 →