LED fabrication via ion implant isolation
View Patent ↗A semiconductor light emitting diode includes a semiconductor substrate, an epitaxial layer of n-type Group III nitride on the substrate, a p-type epitaxial layer of Group III nitride on the n-type epitaxial layer and forming a p-n junction with the n-type layer, and a resistive gallium nitride region on the n-type epitaxial layer and adjacent the p-type epitaxial layer for electrically isolating portions of the p-n junction. A metal contact layer is formed on the p-type epitaxial layer. In method embodiments disclosed, the resistive gallium nitride border is formed by forming an implant mask on the p-type epitaxial region and implanting ions into portions of the p-type epitaxial region to render portions of the p-type epitaxial region semi-insulating. A photoresist mask or a sufficiently thick metal layer may be used as the implant mask.
1. A semiconductor light emitting diode comprising:
a semiconductor active structure for providing an optical emission when current is injected therethrough;
an epitaxial layer of a Group III nitride that includes a top surface, a bottom surface and a side edge on a top surface of said active structure, wherein said epitaxial layer includes a p-type central region and a highly resistive Group III nitride border region that surrounds said p-type central region of the epitaxial layer for electrically isolating said p-type central region of the epitaxial layer; and
a contact layer on the top surface of the epitaxial layer that defines the p-type central region of the epitaxial layer while exposing the highly resistive Group III nitride border region of the epitaxial layer,
wherein the highly resistive Group III nitride border region extends to the side edge of the epitaxial layer.
2. A light emitting diode according to claim 1 wherein said active structure comprises one or more Group III nitride compositions.
3. A light emitting diode according to claim 1 wherein said highly resistive Group III border region has sufficient resistivity to preclude Schottky behavior when said border is in contact with a metal.
4. A light emitting diode according to claim 1 wherein said highly resistive Group III border region has sufficient resistivity to preclude Schottky behavior when said border is in electrical contact with said contact layer.
5. A light emitting diode according to claim 1 mounted on a lead frame with said contact layer in electrical contact with said lead frame.
6. A light emitting diode according to claim 1 wherein said contact layer is selected from the group consisting of platinum, nickel, gold, titanium, aluminum, silver, and combinations thereof.
7. A light emitting diode according to claim 1 further comprising:
a semiconductor substrate; and
a buffer layer on said semiconductor substrate;
and with said semiconductor active structure on said buffer layer.
8. A light emitting diode according to claim 1 wherein the contact layer has sufficient thickness to serve as an ion implantation mask.
9. A light emitting diode according to claim 1 wherein the highly resistive Group III nitride border region comprises a region of the epitaxial layer that includes implanted nitrogen, phosphorus, hydrogen, helium, aluminum and/or N 2 ions.
10. A light emitting diode according to claim 1 wherein the active structure includes at least one quantum well.
11. A light emitting diode according to claim 10 wherein the light emitting diode further includes at least one superlattice structure.
12. A light emitting diode according to claim 5 wherein said light emitting diode is mounted in a flip-chip orientation so that the epitaxial layer is between the active structure and the lead frame.
13. A light emitting diode according to claim 1 further comprising:
a conductive semiconductor substrate on the active structure opposite the epitaxial layer;
an ohmic contact on the semiconductor substrate; and
a bonding pad that is smaller than the ohmic contact on the ohmic contact.
14. A light emitting diode according to claim 1 further comprising a passivation layer on exposed surfaces of the epitaxial layer.
15. A semiconductor light emitting diode comprising:
a lead frame;
a light emitting diode chip that comprises:
an n-type Group III nitride epitaxial layer;
a Group III nitride epitaxial layer that includes a top surface, a bottom surface and side edges on a top surface of the n-type Group III epitaxial layer, the Group III nitride epitaxial layer including a p-type central region and a highly resistive Group III nitride border region that surrounds said p-type central region and extends to a side edge of the Group III nitride epitaxial layer; and
a contact layer on the top surface of the Group III nitride epitaxial layer that exposes the highly resistive Group III nitride border region,
a bonding pad on the contact layer; and
a die attach metal that attaches the bonding pad to the lead frame.
16. A light emitting diode according to claim 15 further comprising:
a semiconductor substrate on the n-type Group III nitride epitaxial layer opposite the Group III nitride epitaxial layer;
an ohmic contact on the semiconductor substrate; and
a bonding pad that is smaller than the ohmic contact on the ohmic contact.
17. A light emitting diode according to claim 16 further comprising a passivation layer on exposed surfaces of the Group III nitride epitaxial layer.
18. A light emitting diode according to claim 17 wherein the contact layer covers the entire p-type central region of the Group III nitride epitaxial layer.
19. A semiconductor light emitting diode comprising:
an n-type Group III nitride epitaxial layer;
a Group III nitride epitaxial layer nitride that includes a top surface, a bottom surface and a side edge on a top surface of the n-type Group III epitaxial layer, the Group III nitride epitaxial layer including a p-type central region and a highly resistive Group III nitride border region that surrounds said p-type central region and extends to the side edges of the Group III nitride epitaxial layer; and
a contact layer on the top surface of the Group III nitride epitaxial layer that exposes the highly resistive Group III nitride border region,
wherein the highly resistive Group III nitride border region does not extend into the n-type Group III nitride epitaxial layer.