Asymmetric finFET device with improved parasitic resistance and capacitance
View Patent ↗A method for forming a fin field effect transistor (finFET) device includes, forming a fin structure in a substrate, forming a gate stack structure perpendicular to the fin structure, and implanting ions in the substrate at an angle (θ) to form a source region and a drain region in the substrate, wherein the angle (θ) is oblique relative to the source region.
1. A method for forming fin field effect transistor (finFET) devices comprising:
forming a fin structure in a substrate;
forming a gate stack structure perpendicular to the fin structure; and
masking a first portion of the gate stack structure and a first portion of the fin structure;
implanting a first type of ions at a first oblique angle to form a first source and drain region in the substrate, wherein the first oblique angle is between 1 and 89 degrees relative to the first source region;
masking the first source and drain region;
removing a portion of the masking from the first portion of the gate stack structure and the first portion of the fin structure;
implanting the first type of ions at a second oblique angle to form a second source and drain region in the substrate, wherein the second oblique angle is between 91 and 179 degrees relative to the first source region;
masking the second source and drain region;
removing another portion of the masking from the first portion of the gate stack structure and the first portion of the fin structure; and
implanting a second type of ions at the first oblique angle to form a third source and drain region in the substrate.
2. The method of claim 1 , wherein the substrate is a silicon on insulator (SOI).
3. The method of claim 1 , wherein the substrate is a bulk silicon layer.
4. The method of claim 1 , wherein the source region and drain regions are partially defined by the fin structure.
5. The method of claim 1 , wherein the gate stack structure includes a metal layer and a polysilicide layer.
6. The method of claim 1 , wherein the method further comprises, forming spacers adjacent to the gate stack structure.
7. The method of claim 6 , wherein the spacers comprise silicon nitride (SiN).
8. The method of claim 1 , wherein the method further comprises depositing a layer of epitaxial silicon (Epi Si) on the fin structure.
9. The method of claim 8 , wherein the method further comprises depositing a capping layer on the layer of Epi Si and the gate stack structure.
10. The method of claim 1 , wherein the oblique angle (θ) is between 1 degree and 89 degrees.
11. The method of claim 1 , wherein the oblique angle (θ) is between 20 degrees and 30 degrees.