Auto recovery from volatile soft error upsets (SEUs)

1. A method of recovering from a soft error within configuration data stored in a configured programmable logic device, comprising:

during operation of the programmable logic device, repeatedly processing the configuration data stored within configuration memory of the device using an error-detection algorithm to generate a checksum;

comparing the generated checksum with a previously generated checksum to detect if a soft error exists in the configuration data;

if a soft error is detected, initiating within the programmable logic device a reconfiguration of the configuration memory;

reconfiguring the configuration memory with the configuration data; and

preventing the resetting of device registers that otherwise occurs during a configuration of the programmable logic device.

2. The method of claim 1 , wherein the configuration memory includes a ROM portion and a RAM portion, and only configuration data stored in the ROM portion of the memory is processed and reconfigured.

3. The method of claim 1 , wherein the initiating step includes initiating within the programmable logic device a complete reconfiguration of the configuration memory.

4. The method of claim 1 , wherein the error detection algorithm is a cyclic redundancy check (CRC) algorithm.

5. The method of claim 1 , wherein the reconfiguration step includes transferring the configuration data from non-volatile memory within the programmable logic device to the configuration memory.

6. A method of recovering from a soft error within configuration data stored in a configured programmable logic device, comprising:

during operation of the programmable logic device, repeatedly processing the configuration data stored within configuration memory of the device using an error-detection algorithm to generate a checksum;

comparing the generated checksum with a previously generated checksum to detect if a soft error exists in the configuration data;

if a soft error is detected, initiating within the programmable logic device a reconfiguration of the configuration memory;

reconfiguring the configuration memory with the configuration data; and

preventing at least one of the following actions that otherwise occur during a configuration of the programmable logic device:

tri-stating of device outputs;

enabling embedded memory writes; and

clearing the configuration memory.

7. A programmable logic device, comprising:

configuration memory;

a configuration engine for configuring the configuration memory with configuration data;

an error detection circuit for detecting whether the configuration data within the configuration memory includes a soft error;

a configuration reset circuit responsive to the error detection circuit for triggering the configuration engine to reconfigure the configuration memory if a soft error is detected; and

a logic circuit responsive to the error detection circuit for preventing device configuration actions that otherwise occur during a configuration of the device.

8. The programmable logic device of claim 7 , wherein the configuration engine is adapted to completely reconfigure the configuration memory.

9. The programmable logic device of claim 7 , wherein the configuration memory includes a ROM portion and a RAM portion, and the configuration circuit is adapted to retrieve configuration data only from the ROM portion and to reconfigure only the ROM portion.

10. The programmable logic device of claim 7 , wherein the logic circuit is adapted to prevent a resetting of device registers from occurring during a configuration of the programmable logic device.

11. The programmable logic device of claim 7 , wherein the logic circuit is adapted to prevent at least one of the following actions from occurring during a configuration of the programmable logic device:

tri-stating of device outputs;

enabling embedded memory writes; and

clearing the configuration memory.

12. The programmable logic device of claim 7 , wherein the error detection circuit includes a cyclic redundancy check (CRC) calculation engine.

13. The programmable logic device of claim 7 including internal non-volatile memory for storing the configuration data, wherein the configuration engine is adapted to reconfigure the configuration memory with the configuration data stored in the internal non-volatile memory.

14. The programmable logic device of claim 7 , wherein the logic circuit in response to the error detection circuit is adapted to prevent an assertion of a reset signal from the configuration engine to the programmable logic device during a configuration of the device.

15. A method of recovering from a soft error within configuration data stored in a configured programmable logic device, comprising:

during operation of the programmable logic device, repeatedly processing the configuration data stored within configuration memory of the device using an error-detection algorithm to generate a checksum;

comparing the generated checksum with a previously generated checksum to detect if a soft error exists in the configuration data; and

if a soft error is detected:

initiating within the programmable logic device a reconfiguration of the configuration memory;

reconfiguring the configuration memory with the configuration data; and

preventing device configuration actions that otherwise occur during a configuration of the device.

16. The method of claim 15 , wherein the device configuration actions include at least one of the following:

resetting or device registers;

tri-stating of device outputs;

enabling embedded memory writes; and

clearing the configuration memory.