Integrated circuit packaging system with cap layer and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

attaching a semiconductor die to a die pad of a leadframe, the leadframe includes an inner lead laterally extending towards the die pad and laterally extending beyond a perimeter of the semiconductor die;

attaching a cap layer to the semiconductor die for acting as a ground plane; and

connecting the semiconductor die to the cap layer through a bonding wire, the bonding wire including a first end directly on a die pad of the semiconductor die and a second end directly on the cap layer.

2. The method as claimed in claim 1 wherein attaching the semiconductor die includes attaching a semiconductor die for overhanging the inner lead of the leadframe.

3. The method as claimed in claim 1 wherein attaching the semiconductor die includes attaching a semiconductor die for overhanging the inner lead of the leadframe and is in contact with the inner lead through a die attach adhesive.

4. The method as claimed in claim 1 wherein attaching the cap layer includes attaching a cap ground plate to the semiconductor die through a cap ground plate adhesive for acting as the ground plane of the packaging system.

5. The method as claimed in claim 1 further comprising forming a cap power ring over the semiconductor die for acting as the power plane of the packaging system.

6. A method of manufacture of an integrated circuit packaging system comprising:

attaching a semiconductor die to a die pad of a leadframe, the semiconductor die overhanging an inner lead positioned along an outer frame of the leadframe, the inner lead laterally extending towards the die pad and laterally extending beyond a perimeter of the semiconductor die;

attaching a cap layer to the semiconductor die for acting as a ground plane;

connecting the semiconductor die to the cap layer through a bonding wire, the bonding wire including a first end directly on a die pad of the semiconductor die and a second end directly on the cap layer; and

removing the outer frame of the leadframe.

7. The method as claimed in claim 6 wherein attaching the cap layer includes forming a cap redistribution layer through a process of passivation of the top surface of the semiconductor die for acting as the ground plane of the packaging system.

8. The method as claimed in claim 6 further comprising:

attaching a cap power plate to the cap layer through a cap power plate adhesive.

9. The method as claimed in claim 6 further comprising:

connecting the cap layer to the inner lead through a lead down bonding wire.

10. The method as claimed in claim 6 further comprising:

connecting the cap layer to a die ground pad on the semiconductor die through a die ground bonding wire.

11. An integrated circuit packaging system comprising:

a die pad;

a semiconductor die attached to the die pad;

an inner lead laterally extending towards the die pad and laterally extending beyond a perimeter of the semiconductor die;

a cap layer attached to the semiconductor die for acting as a ground plane; and

a bonding wire connecting the semiconductor die to the cap layer, the bonding wire including a first end directly on a die pad of the semiconductor die and a second end directly on the cap layer.

12. The system as claimed in claim 11 wherein the semiconductor die overhangs the inner lead.

13. The system as claimed in claim 11 wherein the semiconductor die overhangs the inner lead and is in contact with the inner lead through a die attach adhesive.

14. The system as claimed in claim 11 wherein the cap layer is a cap ground plate attached to the semiconductor die through a cap ground plate adhesive for acting as the ground plane of the packaging system.

15. The system as claimed in claim 11 further comprising a cap power ring formed over the semiconductor die for acting as the power plane of the packaging system.

16. The system as claimed in claim 11 further comprising:

the inner lead overhung by the semiconductor die.

17. The system as claimed in claim 16 wherein the cap layer is a cap redistribution layer formed through a process of passivation of the top surface of the semiconductor die for acting as the ground plane of the packaging system.

18. The system as claimed in claim 16 further comprising:

a cap power plate attached to the cap layer through a cap power plate adhesive.

19. The system as claimed in claim 16 wherein the cap layer and a cap power ring are formed on the semiconductor die.

20. The system as claimed in claim 16 further comprising:

a tie bar grounding bonding wire connecting a die ground pad on the semiconductor die to a tie bar.