Semiconductor devices with heterojunction barrier regions and methods of fabricating same
View Patent ↗An electronic device includes a silicon carbide layer including an n-type drift region therein, a contact forming a junction, such as a Schottky junction, with the drift region, and a p-type junction barrier region on the silicon carbide layer. The p-type junction barrier region includes a p-type polysilicon region forming a P-N heterojunction with the drift region, and the p-type junction barrier region is electrically connected to the contact. Related methods are also disclosed.
1. An electronic device, comprising:
a silicon carbide layer including an n-type drift region therein;
a contact forming a Schottky junction with the drift region;
a p-type junction barrier region on the silicon carbide layer, the p-type junction barrier region including a p-type polysilicon region forming a P-N heterojunction with the drift region and the p-type junction barrier region being electrically connected to the contact; and
a p-type minority injector pad in the drift region beneath the contact and electrically connected to the contact, wherein the p-type minority injector pad region is configured to begin to conduct minority carriers at a higher forward voltage than when the P-N heterojunction begins to conduct majority carriers, the p-type polysilicon region and the p-type minority injector pad in the drift region and protruding above an upper surface of the drift region into the contact, wherein the p-type minority injector pad protrudes above an upper surface of the drift region into the contact further than the p-type polysilicon region.
2. The electronic device of claim 1 , wherein the Schottky junction between the contact and the drift region is configured to conduct current at a lower forward voltage than the P-N heterojunction between the junction barrier region and the drift region.
3. The electronic device of claim 2 , wherein the contact forms an ohmic contact to the p-type polysilicon region, and wherein the P-N heterojunction between the junction barrier region and the drift region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the Schottky junction and at a lower voltage at which the P-N heterojunction between the junction barrier region and the drift region begins to inject minority carriers into the drift region.
4. The electronic device of claim 1 , further comprising: a guard ring termination region at a surface of the silicon carbide layer laterally adjacent to the contact, wherein the guard ring termination region includes a second p-type polysilicon region on the drift region, the second p-type polysilicon region being electrically isolated from the contact under zero bias conditions.
5. The electronic device of claim 4 , further comprising a junction termination region at the surface of the silicon carbide layer having a conductivity type opposite the conductivity type of the drift region, wherein the second p-type polysilicon region extends into the junction termination region.
6. The electronic device of claim 1 , wherein the junction barrier region comprises a plurality of p-type polysilicon regions in the drift region.
7. The electronic device of claim 6 , wherein the minority injector pad has a surface area in a horizontal plane parallel to a major surface of the silicon carbide layer that is larger than a surface area in the horizontal plane of one of the plurality of p-type polysilicon regions in the junction barrier region.
8. The electronic device of claim 6 , wherein the minority carrier injector pad has a surface area in a horizontal plane parallel to a major surface of the silicon carbide layer that is at least about 10% of a surface area of the drift region in the horizontal plane below the contact.
9. The electronic device of claim 1 , wherein the contact comprises a first contact, the device further comprising an n+ silicon carbide contact layer on the drift region opposite the contact, and a second contact on the contact layer.
10. An electronic device, comprising:
a drift region having a first conductivity type;
a contact on the drift region and forming a junction with the drift region;
a junction barrier region on the drift region, the junction barrier region having a second conductivity type opposite the first conductivity type and including a heterojunction barrier region on the drift region, wherein the heterojunction barrier region forms a P-N heterojunction with the drift region and is in electrical contact with the contact; and
a p-type minority injector pad in the drift region beneath the contact and electrically connected to the contact, the p-type minority injector pad region being configured to begin to conduct minority carriers at a higher forward voltage than when the P-N heterojunction begins to conduct majority carriers, wherein the junction between the contact and the drift region comprises a Schottky junction that is configured to conduct current at a lower forward voltage than the P-N heterojunction between the heterojunction barrier region and the drift region.
11. The electronic device of claim 10 , further comprising:
a guard ring termination region on the drift region and laterally adjacent to the junction, wherein the guard ring termination region includes a second heterojunction barrier region.
12. The electronic device of claim 10 , wherein the heterojunction barrier region comprises a plurality of p-type polysilicon regions on the drift region.
13. The electronic device of claim 12 , wherein the minority carrier injection pad has a width that is greater than a width of the junction barrier region.
14. The electronic device of claim 12 , wherein the minority injector pad has a horizontal surface area that is larger than a horizontal surface area of one of the plurality of p-type polysilicon regions in the junction barrier region.
15. The electronic device of claim 10 , wherein the drift region comprises n-type silicon carbide and the heterojunction barrier region comprises p-type polysilicon.
16. The electronic device of claim 10 , wherein the drift region comprises n-type silicon carbide and the heterojunction barrier region comprises p-type gallium nitride.
17. The electronic device of claim 10 , further comprising:
a termination region at a surface of the drift region and defining an active region of the device within the termination region;
wherein a ratio of a surface area of the active region occupied by the heterojunction barrier regions to a total surface area of the active region is about 2% to about 40%.
18. The electronic device of claim 17 , wherein the ratio of the surface area of the active region occupied by the heterojunction barrier regions to the total surface area of the active region is about 10% to about 30%.
19. The electronic device of claim 17 , wherein the ratio of the surface area of the active region occupied by the heterojunction barrier regions to the total surface area of the active region is about 20% to about 30%.
20. An electronic device, comprising:
a silicon carbide layer including a drift region having a first conductivity type;
a contact on a surface of the drift region and forming a junction with the drift region;
a junction barrier region on the drift region, the junction barrier region having a second conductivity type opposite the first conductivity type and including a heterojunction barrier region on the drift region, wherein the heterojunction barrier region forms a P-N heterojunction with the drift region and is in electrical contact with the contact;
a p-type minority injector pad on the drift region beneath the contact and electrically connected to the contact, the p-type minority injector pad region being configured to begin to conduct minority carriers at a higher forward voltage than when the P-N heterojunction begins to conduct majority carriers; and
a beveled edge termination terminating the surface of the drift region proximate an edge of the contact.
21. The electronic device of claim 1 , wherein the p-type minority injector pad comprises polysilicon.
22. The electronic device of claim 1 , wherein the P-N heterojunction between the junction barrier region and the drift region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the Schottky junction.
23. The electronic device of claim 1 , wherein the p-type polysilicon region has an upper portion that extends laterally onto the upper surface of the drift region at a greater width than a portion of the p-type polysilicon region in the drift region, and wherein the p-type minority injector pad has an upper portion that extends laterally onto the upper surface of the drift region at a greater width than a portion of the p-type minority injector pad in the drift region.
24. The electronic device of claim 10 , wherein the P-N heterojunction between the junction barrier region and the drift region is configured to begin to conduct majority carriers at a higher forward voltage than a turn on voltage of the junction between the contact and the drift region.