IP Library Granted Patent US 8,138,816
Granted Patent B2
US 8,138,816 · App. 12/729,440 · Granted Mar 20, 2012

Digitally controlled high Q factor capacitor

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Quick Facts
Patent No.
US 8,138,816
App. No.
12/729,440
Granted
Mar 20, 2012
Kind
B2
Abstract

A control circuit and a conversion circuit. The control circuit may be configured to generate an analog control signal in response to a digital control signal. The conversion circuit may be configured to generate a capacitance signal in response to the analog control signal.

Claims (25)

1. An apparatus comprising:

a control circuit configured to generate an analog control signal in response to a digital control signal, wherein said control circuit comprises a digital interface circuit and a digital-to-analog converter circuit; and

a conversion circuit configured to generate a capacitance signal in response to said analog control signal, wherein said digital interface circuit comprises a plurality of resistors each configured to be switched in response to said analog control signal.

2. The apparatus according to claim 1 , wherein said control circuit generates a plurality of said analog control signals.

3. The apparatus according to claim 1 , wherein said conversion circuit generates a plurality of said capacitance signals.

4. The apparatus according to claim 1 , wherein said capacitance signal is usable by an application circuit external to said apparatus.

5. The apparatus according to claim 4 , wherein said control circuit further responds to an input signal is received from said application circuit.

6. The apparatus according to claim 1 , wherein said conversion circuit further comprises a varactor diode.

7. The apparatus according to claim 1 , wherein said control circuit further comprises an oscillator circuit.

8. The apparatus according to claim 1 , further comprising:

a plurality of said control circuits each configured to generate one of a plurality of analog control signals; and

a plurality of said conversion circuits each configured to generate one of a plurality of said capacitance signals.

9. The apparatus according to claim 1 , wherein said digital control signal comprises a multi-bit digital word.

10. The apparatus according to claim 1 , wherein said digital control signal comprises a serial digital signal.

11. The apparatus according to claim 1 , wherein said control circuit comprises a digital interface circuit and a digital-to-analog converter circuit.

12. The apparatus according to claim 11 , wherein a plurality of switches each select one of said plurality of resistors in response to a selected one of a plurality of voltage points on a plurality of bond pads.

13. An apparatus comprising:

means for generating an analog control signal in response to a digital control signal, wherein said generating means comprises a digital interface circuit and a digital-to-analog converter circuit; and

means for generating a capacitance signal in response to said analog control signal, wherein said digital interface circuit comprises a plurality of resistors configured to be switched in response to said analog control signal.

14. A method for digitally controlling a capacitance comprising the steps of:

(A) generating an analog control signal in response to a digital control signal, wherein said control circuit comprises a digital interface circuit and a digital-to-analog converter circuit; and

(B) generating a capacitance signal in response to said analog control signal, wherein said digital interface circuit comprises a plurality of resistors configured to be switched in response to said analog control signal.

15. The apparatus according to claim 13 , wherein a plurality of switches each select one of said plurality of resistors in response to a selected one of a plurality of voltage points on a plurality of bond pads.

16. The method according to claim 14 , further comprising the step of:

selecting one of said plurality of resistors in response to a selected one of a plurality of voltage points on a plurality of bond pads.

Assignments (8)
CHANGE OF NAME Recorded Jun 23, 2016
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 039139/0826 →
SECURITY INTEREST Recorded May 9, 2014
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.; MINDSPEED TECHNOLOGIES, INC.; BROOKTREE CORPORATION
To: GOLDMAN SACHS BANK USA
Reel/Frame 032859/0374 →
RELEASE OF SECURITY INTEREST Recorded May 8, 2014
From: JPMORGAN CHASE BANK, N.A.
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 032857/0032 →
SECURITY AGREEMENT Recorded Sep 30, 2013
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 031314/0183 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 25444/920 Recorded Oct 6, 2011
From: RBS BUSINESS CAPITAL, A DIVISION OF RBS ASSET FINANCE, INC., AS ADMINISTRATIVE AGENT
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.; MIMIX BROADBAND, INC.
Reel/Frame 027028/0021 →
SECURITY AGREEMENT Recorded Oct 4, 2011
From: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 027015/0444 →
SECURITY AGREEMENT Recorded Dec 6, 2010
From: MIMIX BROADBAND, INC.; M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
To: RBS BUSINESS CAPITAL, A DIVISION OF RBS ASSET FINANCE, INC., AS AGENT
Reel/Frame 025444/0920 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2010
From: FREESTON, ANDREW K.; REDUS, JACK
To: M/A-COM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
Reel/Frame 024122/0551 →