IP Library Granted Patent US 8,725,931
Granted Patent B1
US 8,725,931 · App. 12/732,951 · Granted May 13, 2014

System and method for managing the execution of memory commands in a solid-state memory

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Quick Facts
Patent No.
US 8,725,931
App. No.
12/732,951
Granted
May 13, 2014
Kind
B1
Abstract

Embodiments of the invention are directed to a storage subsystem comprising a non-volatile solid-state memory array and a controller. In one embodiment, the controller includes a system operation module configured to manage system memory operations and a queue configured to receive memory commands from a host system and the system operation module. The controller is configured to execute, in the memory array, memory commands from the queue in a sequence that is based at least in part on a throttling ratio provided by the system operation module.

Claims (26)

1. A storage subsystem, comprising:

a non-volatile solid-state memory array; and

a controller comprising:

a system operation module configured to manage system memory operations; and

a queue configured to receive memory commands from a host system and the system operation module,

the controller configured to execute, in the memory array, memory commands from the queue in a sequence based at least in part on a throttling ratio provided by the system operation module by initiating execution of write memory commands and garbage collection commands at a ratio corresponding to the throttling ratio, wherein the memory commands from the host system comprise read memory commands and the write memory commands, and wherein the read memory commands are executed without regard to the throttling ratio.

2. The storage subsystem of claim 1 , wherein the system operation module comprises a garbage collection module.

3. The storage subsystem of claim 2 , wherein the throttling ratio is based at least in part on a percentage of invalid pages in a current block selected by the garbage collection module for a garbage collection memory operation.

4. The storage subsystem of claim 2 , wherein the throttling ratio is calculated by dividing the number of valid pages by the number of invalid pages in a current block selected by the garbage collection module for a garbage collection memory operation.

5. The storage subsystem of claim 2 , wherein the controller is configured to execute the memory commands from the host system and the garbage collection module in a sequence that depends on the throttling ratio.

6. The storage subsystem of claim 1 , wherein the queue comprises a first queue configured to receive memory commands from the host system and a second queue configured to receive memory commands from the system operation module.

7. The storage subsystem of claim 6 , wherein the throttling ratio comprises a number and the controller is further configured to execute, for each command in the first queue, at least a number of memory commands in the second queue specified by the number.

8. The storage subsystem of claim 1 , wherein the throttling ratio comprises a first number and a second number and the controller is further configured to execute a number of memory commands from the system operation module specified by the first number for every number of memory commands from the host system specified by the second number.

9. A method of managing memory operations in non-volatile solid-state memory:

selecting a target block for a system operation;

determining a throttling ratio;

providing one or more commands for the system operation to a queue associated with a controller for the non-volatile solid-state memory; and

executing from the queue the one or more system operation commands and one or more commands received from a host system in a sequence based at least in part on the throttling ratio by initiating execution of write commands and the one or more system operation commands at a ratio corresponding to the throttling ratio, wherein the one or more commands received from the host system comprise read commands and the write commands, and wherein the read commands are executed without regard to the throttling ratio.

10. The method of claim 9 , wherein the system operation comprises a garbage collection operation.

11. The method of claim 10 , wherein the queue comprises a first queue configured to receive the commands from the host system and a second queue configured to receive the commands for the garbage collection operation.

12. The method of claim 10 , wherein the determining a throttling ratio comprises calculating the throttling ratio based on the percentage of invalid pages in the target block.

13. The method of claim 10 , wherein the determining a throttling ratio comprises dividing the number of valid pages by the number of invalid pages in the target block.

14. The method of claim 10 , wherein the executing comprises:

executing, for each command received from the host system, at least a number of the commands for the garbage collection operation specified by the throttling ratio.

15. The method of claim 9 , wherein the throttling ratio comprises a first and a second numbers and the executing comprises:

executing a number of the system operation commands specified by the first number for every number of the commands received from the host system specified by the second number.

Assignments (13)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 038744 FRAME 0481 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058982/0556 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 045501/0714 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0481 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0281 →
SECURITY AGREEMENT Recorded May 17, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038722/0229 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2010
From: KANG, HO-FAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 024147/0550 →