Systems and methods for an adjustable filter engine
View Patent ↗Systems and methods are provided for an adjustable filter engine. In particular, an electronic system is provided that can include a focus module, memory, and control circuitry. In some embodiments, the focus module can include an adjustable filter engine and a motor. By using the adjustable filter engine to generate a filter with a large number of filter coefficients, the control circuitry can accommodate a variety of system characteristics. For example, by generating a set of cumulative coefficients and re-arranging the order of the cumulative coefficients, the control circuitry can reduce the bit-width requirements of the adjustable filter engine hardware. For instance, the control circuitry can reduce the number of multipliers required to perform a convolution between an updated filter and one or more input signals. In some embodiments, the updated filter can be generated to reduce oscillations of the motor movement due to a new position request.
1. A method of generating an updated filter, the method comprising:
receiving a set of filter coefficients;
generating a set of cumulative coefficients from the set of filter coefficients, each element of which corresponding to an accumulation of one or more coefficients of said set of filter co-efficients;
storing the set of cumulative coefficients in a memory included in an electronic device;
adjusting at least one parameter associated with the set;
accessing one or more cumulative coefficients of the set based at least in part on the at least one parameter; and
generating an updated filter based on the one or more cumulative coefficients, by at least one of selectively accessing and rearranging the order of ones of said stored cumulative coefficients.
2. The method of claim 1 , wherein the memory is a static random access memory (“SRAM”).
3. The method of claim 1 , wherein the generating the set of cumulative coefficients is performed according to:
C={C i |C i =Σc k , iε{ 1 , . . . , N− 1}}, for k= 0 to i=N− 1− i
where C is the set of cumulative coefficients, c k is the set of filter coefficients, and N is the number of coefficients of the original filter.
4. The method of claim 1 , wherein the programming further comprises reversing an ordering of the set of cumulative coefficients.
5. The method of claim 1 , wherein the programming further comprising programming a number of cumulative coefficients of the set of cumulative coefficients into a register of the memory.
6. The method of claim 1 , wherein the adjusting comprises adjusting one or more filter characteristics based on one or more system characteristics.
7. The method of claim 1 , wherein the adjusting comprises: determining a preferred settling time of a step response of the adjusted filter; and adjusting a number of cumulative coefficients of the set of cumulative coefficients based at least in part on the preferred settling time.
8. The method of claim 1 , wherein the adjusting comprises programming the at least one parameter into a register of an adjustable filter engine.
9. The method of claim 1 , wherein the adjusting further comprises: determining a sampling period of the set of cumulative coefficients in the memory based at least in part on a system clock rate and a sampling rate of the original filter; and programming the sampling period into a register of the memory.
10. The method of claim 1 , wherein the at least one parameter comprises at least one of a sampling period, a start address, a step size, and a number of cumulative coefficients.
11. A system for generating an updated filter, comprising:
a memory comprising at least one register provided in an electronic device; and
control circuitry, wherein the control circuitry is operative to:
receive a set of filter coefficients;
generate a set of cumulative coefficients from the set of filter coefficients, each element of which corresponding to an accumulation of one or more coefficients of said set of filter coefficients;
store the set of cumulative coefficients in the memory;
adjust at least one parameter associated with the set;
access one or more cumulative coefficients of the set based at least in part on the at least one parameter; and
generate an updated filter based on the one or more cumulative coefficients, by at least one of selectively accessing and rearranging the order of ones of said stored cumulative coefficients.
12. The system of claim 11 , wherein the memory is a static random access memory (“SRAM”).
13. The system of claim 11 , wherein said generate a set of cumulative coefficients is performed according to:
C={C i |C i =Σc k , iε{ 1 , . . . , N− 1}}, for k= 0 to i=N− 1− i
where C is the set of cumulative coefficients, c k is the set of filter coefficients, and N is the number of coefficients of the original filter.
14. The system of claim 11 , wherein said programming further comprises reversing an ordering of the set of cumulative coefficients.
15. The system of claim 11 , wherein said programming further comprises programming a number of cumulative coefficients of the set of cumulative coefficients into a register of the memory.
16. The system of claim 11 , wherein said adjust at least one parameter comprises adjusting one or more filter characteristics based on one or more system characteristics.
17. The system of claim 11 , wherein said adjust at least one parameter comprises: determining a preferred settling time of a step response of the adjusted filter; and
adjusting a number of cumulative coefficients of the set of cumulative coefficients based at least in part on the preferred settling time.
18. The system of claim 11 , wherein said adjust at least one parameter comprises programming the at least one parameter into a register of an adjustable filter engine.
19. The system of claim 11 , wherein said adjust at least one parameter further comprises:
determining a sampling period of the set of cumulative coefficients in the memory based at least in part on a system clock rate and a sampling rate of the original filter; and
programming the sampling period into a register of the memory.
20. The system of claim 11 , wherein the at least one parameter comprises at least one of a sampling period, a start address, a step size, and a number of cumulative coefficients.
21. The system of claim 11 , wherein said memory and control circuitry are integrated in a semiconductor chip.