IP Library Granted Patent US 8,476,668
Granted Patent B2
US 8,476,668 · App. 12/814,241 · Granted Jul 2, 2013

High voltage low current surface emitting LED

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Quick Facts
Patent No.
US 8,476,668
App. No.
12/814,241
Granted
Jul 2, 2013
Kind
B2
Abstract

An LED chip comprising a plurality of sub-LEDs on a submount. Electrically conductive and electrically insulating features are included that serially interconnect the sub-LEDs such that an electrical signal applied to the serially interconnected sub-LEDs along the electrically conductive features spreads to the serially interconnected sub-LEDs. A via is included that is arranged to electrically couple one of the sub-LEDs to the submount. The sub-LEDs can be interconnected by more than one of the conductive features, with each one of the conductive features capable of spreading an electrical signal between two of the sub-LEDs.

Claims (41)

1. A LED chip, comprising:

a plurality of sub-LEDs collectively bonded by a common bond layer to a submount, wherein the common bond layer does not electrically interconnect the plurality of sub-LEDs;

electrically conductive and electrically insulating features serially interconnecting said sub-LEDs; and

at least one via arranged to electrically couple at least one of said sub-LEDs to said submount.

2. The LED chip of claim 1 , wherein said submount is electrically conductive, an electrical signal on said via passing through said submount.

3. The LED chip of claim 1 , wherein said submount is electrically insulating, said via running through said submount.

4. The LED chip of claim 1 , further comprising a wire bond pad electrically coupled to said first of said serially interconnected sub-LEDs, said via electrically coupled to the last of said serially interconnected sub-LEDs.

5. The LED chip of claim 1 , wherein an electrical signal applied across the wire bond pad and said via causes said sub-LEDs to emit light.

6. The LED chip of claim 1 , wherein said sub-LEDs are formed from a single junction LED.

7. The LED chip of claim 1 , comprising a plurality of electrically conductive features serially interconnecting two of said sub-LEDs, each said electrically conductive feature capable of spreading said electrical signal between said two of said sub-LEDs.

8. The LED chip of claim 1 , further comprising an insulator layer between said submount and said sub-LEDs.

9. The LED chip of claim 1 , wherein the voltage necessary to drive said sub-LEDs is dependent on the number of said serially interconnected sub-LEDs and the junction voltage of said sub-LEDs.

10. The LED chip of claim 1 , wherein the active area utilization ratio is greater than 50%.

11. The LED chip of claim 1 , wherein the active area utilization ratio is greater than 75%.

12. The LED chip of claim 1 , wherein said sub-LEDs are flip-chip mounted on said substrate.

13. The LED chip of claim 1 , wherein the alignment tolerance between said sub-LEDs is less than 5 microns.

14. The LED chip of claim 1 , wherein the alignment tolerance between said sub-LEDs is less than 2 microns.

15. The LED chip of claim 1 , emitting a white light from said sub-LEDs.

16. A LED chip, comprising:

a plurality of sub-LEDs mounted on a submount;

connector traces serially interconnecting said sub-LEDs;

insulating features to insulate portions of said sub-LEDs from said connector traces;

at least one bottom contact disposed between at least one of said sub-LEDs and said submount; and

at least one via extending perpendicularly from said submount to contact a sidewall of said at least one bottom contact of said at least one of said sub-LEDs.

17. The LED chip of claim 16 , further comprising a plurality of bottom contacts, each of which is between one of said sub-LEDs and said submount.

18. The LED chip of claim 16 , further comprising a metal stack and an insulating layer arranged between said sub-LEDs and said submount, said via passing through said insulating layer.

19. The LED chip of claim 16 , wherein said submount is electrically conductive, and wherein said via contacts said submount.

20. The LED chip of claim 16 , wherein said submount is electrically insulating, said via running through said submount.

21. The LED chip of claim 16 , further comprising a wire bond pad electrically coupled to said first of said serially interconnected sub-LEDs, said via electrically coupled to the last of said serially interconnected sub-LEDs.

22. The LED chip of claim 16 , wherein an electrical signal applied across the wire bond pad and said via causes said sub-LEDs to emit light.

23. The LED chip of claim 16 , wherein an electrical signal applied across the wire bond pad and said submount causes said sub-LEDs to emit light.

24. The LED chip of claim 16 , wherein at least two of said sub-LEDs is interconnected by a plurality of said connector traces.

25. A LED chip, comprising:

a plurality of sub-LEDs on a submount; and

a plurality of electrically conductive features serially interconnecting at least some of said sub-LEDs, wherein at least two of said sub-LEDs are electrically interconnected by more than one of said conductive features that provide at least one redundant electrical connection between the at least two of said sub-LEDs, each one of said conductive features capable of spreading an electrical signal between said two of said sub-LEDs.

26. The LED chip of claim 25 , wherein said more than one conductive features comprise at least two conductive traces.

27. The LED chip of claim 25 , wherein each of said conductive features is capable of spreading an electrical signal between said two of said sub-LEDs such that said sub-LEDs emit light in response to said signal.

28. The LED chip of claim 25 , further comprising insulating features cooperating with said conductive features to allow said signal to spread between said two of said sub-LEDs.

29. A LED chip, comprising:

a plurality of sub-LEDs on a submount; and

a plurality of electrically conductive paths serially connecting at least some of said sub-LEDs, wherein first and second contacts of respective adjacent first and second ones of said serially connected sub-LEDs are connected by more than one of said electrically conductive paths.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 56012 FRAME 200. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 9, 2025
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 071874/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2021
From: CREE, INC.
To: CREE LED, INC.
Reel/Frame 056012/0200 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: IBBETSON, JAMES; HEIKMAN, STEN
To: CREE, INC.
Reel/Frame 024538/0949 →