IP Library Granted Patent US 8,680,687
Granted Patent B2
US 8,680,687 · App. 12/821,454 · Granted Mar 25, 2014

Electrical interconnect for die stacked in zig-zag configuration

Inventors: Reynaldo Co (Scotts Valley, CA); Grant Villavicencio (Scotts Valley, CA); Jeffrey S. Leal (Scotts Valley, CA); Simon J. S. McElrea (Scotts Valley, CA)
Assignee: Invensas Corporation
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Quick Facts
Patent No.
US 8,680,687
App. No.
12/821,454
Granted
Mar 25, 2014
Kind
B2
Abstract

A die (or of a stack of die) is mounted over and elevated above a support, and is electrically connected to circuitry in the support. Pillars of electrically conductive material are formed on a set of bond pads at a mount side of the support, and the elevated die (or at least one die in the elevated stack of die) is electrically connected to the support, by traces of an electrically conductive material contacting interconnect pads on the die to the pillars, and through the pillars to the support. Also, tiered offset stacked die assemblies in a zig-zag configuration, in which the interconnect edges of a first (lower) tier face in a first direction, and the interconnect edges of a second (upper) tier, stacked over the first tier, face in a second direction, different from the first direction, are electrically connected to a support. Die in the first tier are electrically interconnected die-to-die, and the tier is electrically connected to a support, by traces of an electrically conductive material contacting interconnect pads on the die and a first set of bond pads on the support. Pillars of a electrically conductive material are formed on a second set of bond pads, and die in the second tier are electrically interconnected die-to-die, and the tier is electrically connected to the support, by traces of an electrically conductive material contacting interconnect pads on the die to the pillars, and through the pillars to the substrate.

Claims (34)

1. A semiconductor assembly comprising an elevated die mounted over and elevated above a support, said elevated die having a plurality of interconnect pads at a front side thereof, said support having pillars of a first electrically conductive material, each pillar on a respective bond pad at a mount side thereof, wherein the elevated die is electrically connected to the support by traces of a second electrically conductive material, each trace contacting each of at least two of said plurality of interconnect pads and the corresponding pillar on the corresponding bond pad, wherein said second electrically conductive material comprises a conductive material in particle form in a polymer matrix.

2. The assembly of claim 1 wherein the first electrically conductive material and the second electrically conductive material comprise the same material.

3. The assembly of claim 1 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a partially cured material.

4. The assembly of claim 1 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a curable material.

5. The assembly of claim 1 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a metal-filled polymer.

6. The assembly of claim 5 wherein the metal-filled polymer comprises a metal filled epoxy.

7. The assembly of claim 5 wherein the metal-filled polymer comprises a metal filled thermosetting polymer.

8. The assembly of claim 5 wherein the metal-filled polymer comprises a metal filled thermoplastic polymer.

9. The assembly of claim 1 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a conductive material in particle form in a carrier.

10. The assembly of claim 9 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises an electrically conductive ink.

11. A semiconductor assembly comprising a plurality of die in a die stack mounted over a support, at least a first said die being elevated above the support, said first die having an interconnect pad at a front side thereof, said support having a pillar of a first electrically conductive material on a bond pad at a mount side thereof, wherein said first die is electrically connected to the support by a trace of a second electrically conductive material contacting the interconnect pad on the die to the pillar on the bond pad, wherein said second electrically conductive material comprises a conductive material in particle form in a polymer matrix, wherein at least a second said die is electrically connected to said first die by a trace of a third electrically conductive material contacting the interconnect pad on the first die with an interconnect pad on said second die.

12. The assembly of claim 11 wherein the first electrically conductive material and the second electrically conductive material comprise the same material.

13. The assembly of claim 11 wherein the third electrically conductive material and the second electrically conductive material comprise the same material.

14. The assembly of claim 11 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a partially cured material.

15. The assembly of claim 11 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a curable material.

16. The assembly of claim 11 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a metal-filled polymer.

17. The assembly of claim 16 wherein the metal-filled polymer comprises a metal filled epoxy.

18. The assembly of claim 16 wherein the metal-filled polymer comprises a metal filled thermosetting polymer.

19. The assembly of claim 16 wherein the metal-filled polymer comprises a metal filled thermoplastic polymer.

20. The assembly of claim 11 wherein at least one of said first electrically conductive material and said second electrically conductive material comprises a conductive material in particle form in a carrier.

21. The assembly of claim 20 wherein the electrically conductive material comprises an electrically conductive ink.

22. A semiconductor assembly comprising a plurality of die in an upper die stack mounted over and elevated above a support, at least a first die in said upper stack having an interconnect pad at a front side thereof, said support having a pillar of a first electrically conductive material on a bond pad at a mount side thereof, wherein said first die in said upper stack is electrically connected to the support by a trace of a second electrically conductive material contacting the interconnect pad on said first die in said upper stack to the pillar on the bond pad, wherein said second electrically conductive material comprises a conductive material in particle form in a polymer matrix wherein at least a second said die in said upper stack is electrically connected to said first die by a trace of a third electrically conductive material contacting the interconnect pad on the first die with an interconnect pad on said second die.

23. The semiconductor assembly of claim 22 , further comprising a lower die situated between the support and the upper die stack.

24. The semiconductor assembly of claim 22 , further comprising a lower die stack situated between the support and the upper die stack.

25. The semiconductor assembly of claim 24 wherein said lower die stack comprises a tiered offset stacked die assembly, and wherein die in the lower die stack are electrically interconnected die-to-die, and the lower die stack is electrically connected to a support by traces of an electrically conductive material contacting interconnect pads on the die of the lower die stack and a set of bond pads on the support.

26. The semiconductor assembly of claim 22 , further comprising a semiconductor package situated between the support and the upper die stack.

27. The semiconductor assembly of claim 22 wherein the upper die stack comprises a tiered offset stacked die assembly in which interconnect edges of the die in the upper die stack face in a first direction and interconnect die pads are aligned with the pillar.

28. A die stack assembly comprising first and second tiered offset die stacks in a zig-zag configuration, a support having a first set of bond pads and a second set of bond pads, and a plurality of pillars projecting above and electrically connected with the second set of bond pads, wherein

die in the first die stack being electrically interconnected die-to-die by first traces of electrically conductive material contacting interconnect pads on die of the first die stack and the first traces of electrically conductive material electrically connect the die in the first die stack with the first set of bond pads; and

die in the second die stack being electrically interconnected die-to-die by second traces of electrically conductive material contacting interconnect pads on die of the second die stack and the second traces of electrically conductive material electrically connect the die in the second die stack with the pillars,

wherein the electrically conductive material comprises a conductive material in particle form in a polymer matrix.

29. The die stack assembly of claim 28 wherein interconnect edges of the die in the first die stack face in a first direction, and interconnect edges of the die in the second die stack face in a second direction different from the first direction.

30. The die stack assembly of claim 28 wherein the first direction is opposite to the second direction.

31. The die stack assembly of claim 28 wherein the first direction is orthogonal to the second direction.

Assignments (8)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073941/0814 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0745 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2012
From: VERTICAL CIRCUITS (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
To: INVENSAS CORPORATION
Reel/Frame 029458/0905 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2012
From: VERTICAL CIRCUITS, INC.
To: VERTICAL CIRCUITS (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
Reel/Frame 029186/0755 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2010
From: CO, REYNALDO; VILLAVICENCIO, GRANT; LEAL, JEFFREY S.; MCELREA, SIMON J.S.
To: VERTICAL CIRCUITS, INC.
Reel/Frame 024880/0723 →
Continuity (2)
Provisional Application 61220986 · Jun 26, 2009
Related Publication 20100327461A1 · Dec 30, 2010