IP Library Granted Patent US 8,466,991
Granted Patent B2
US 8,466,991 · App. 12/838,705 · Granted Jun 18, 2013

Optical black pixel cell readout systems and methods

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Quick Facts
Patent No.
US 8,466,991
App. No.
12/838,705
Granted
Jun 18, 2013
Kind
B2
Abstract

This is generally directed to systems and methods for reading optical black pixel cells. For example, in some embodiments, the columns of a pixel array can be shunted together during an optical black pixel readout phase of the imaging system. This may, for example, help improve correction of column fixed pattern noise or other noise. In some embodiments, the column may be shunted together during the optical black pixel readout phase of the imaging system and not shunted during other phases of the imaging system (e.g., when reading values from active pixel cells, barrier pixel cells, etc). In some embodiments, circuitry for providing the column shunting can be implemented as an independent block of the imaging system. In other embodiments, this circuitry can be implemented within other blocks of the imaging system. As an illustration, the shunting circuitry can be implemented within a VLN block of the imaging system.

Claims (69)

1. A method comprising:

receiving a first row address of a pixel array of an imaging system, the pixel array comprising a plurality of rows of pixels, shunting circuitry, and column circuitry, wherein the first row address defines a row of pixels of the plurality of rows of pixels that is currently being sampled;

determining whether the first row address corresponds to a row including at least one optical black pixel cell;

in response to determining the first row address corresponds to a row including at least one optical black pixel cell, enabling a plurality of switches of the shunting circuitry to couple a plurality of column lines of the pixel array together, wherein each of the plurality of column lines couples pixel cells of a corresponding column together; and

in response to not determining the first row address corresponds to a row including at least one optical black pixel cell, disabling the plurality of switches such that the plurality of switches de-couple the plurality of column lines.

2. The method of claim 1 , wherein the row of pixels that is currently being sampled comprises:

a row of pixels including at least one pixel cell generating at least one signal corresponding to an amount of light sensed by the at least one pixel cell, wherein the at least one signal is read by the imaging system.

3. The method of claim 1 , wherein the at least one optical black pixel cell comprises:

a pixel cell including identical electrical characteristics to an active pixel cell but is unresponsive to light, wherein the optical black pixel cell can operate as a reference pixel for the imaging system.

4. The method of claim 1 , wherein the enabling comprises:

generating a command signal applied to a gate of each switch of the plurality of switches, wherein the command signal turns each switch on such that each switch becomes conductive.

5. The method of claim 1 , wherein not determining the first row address corresponds to a row including at least one optical black pixel cell comprises:

determining the first row address corresponds to a row consisting of at least one of active pixel cells and barrier pixel cells.

6. The method of claim 1 , wherein the plurality of column lines comprise all column lines of the pixel array apart from column lines corresponding to barrier pixel cells.

7. The method of claim 1 , further comprising:

receiving a next row address of the pixel array, wherein the next row address defines a next row of pixels that is now currently being sampled; and

repeating the determining, enabling, and disabling for the next row address.

8. A method for optical black pixel readout of a pixel array of an imaging system, the method comprising:

shunting column lines of the pixel array together during an optical black pixel readout phase of the imaging system, wherein shunting the column lines comprises turning on a plurality of switches coupled in series, wherein each switch of the plurality of switches is coupled on a first end to a first column line and is coupled on a second end to a second column line;

reading out optical black pixel rows of the pixel array; and

removing the shunting of the column lines during an active pixel readout phase of the imaging system.

9. The method of claim 8 , further comprising:

removing the shunting of the column lines during a barrier pixel readout phase of the imaging system.

10. The method of claim 8 , wherein the plurality of switches comprises a plurality of NMOS transistors.

11. The method of claim 8 , wherein the plurality of switches are implemented as an individual block of the imaging system.

12. The method of claim 8 , wherein the plurality of switches are implemented as part of a voltage line bias block of the imaging system.

13. The method of claim 8 , wherein the active pixel readout phase comprises:

reading a reference signal generated by at least one active pixel cell of the pixel array;

reading a signal level signal generated by the at least one active pixel cell, wherein the signal level signal corresponds to an amount of light sensed by the at least one pixel cell; and

generating an output signal based on the reference signal and the signal level signal.

14. A method for optical black pixel readout of a pixel array of an imaging system, the method comprising:

shunting column lines of the pixel array together during an optical black pixel readout phase of the imaging system;

reading out optical black pixel rows of the pixel array; and

removing the shunting of the column lines during an active pixel readout phase of the imaging system, wherein removing the shunting comprises:

turning off a plurality of switches coupled in series, wherein each switch of the plurality of switches is coupled on a first end to a first column line and is coupled on a second end to a second column line.

15. An imaging system comprising:

a pixel array comprising:

a plurality of pixel cells arranged in a plurality of columns and a plurality of rows; and

a plurality of column lines, wherein each column line corresponds to a separate column of the plurality of columns and wherein each column line couples the pixel cells of the separate column together;

column circuitry coupled to each column line of the plurality of column lines, wherein the column circuitry is operable to sample and process signals generated by the plurality of pixel cells;

shunting circuitry operable to either couple or de-couple the plurality of column lines together; and

control circuitry operable to:

instruct the shunting circuitry to couple the plurality of column lines together during an optical black pixel readout phase of the imaging system; and

instruct the shunting circuitry to de-couple the plurality of column lines during active pixel cell readout phase of the imaging system.

16. The imaging system of claim 15 , wherein the shunting circuitry is coupled between the pixel array and the column circuitry.

17. The imaging system of claim 15 , wherein the column circuitry comprises:

reference signal circuitry operable to sample and hold reference signals generated by the plurality of pixel cells;

image signal circuitry operable to sample and hold image signals generated by the plurality of pixel cells;

an amplifier operable to amplify the reference signals and the image signals; and

column select circuitry operable to select a particular column of the plurality of columns for processing.

18. The imaging system of claim 15 , wherein the control circuitry comprises:

a decoder operable to:

receive a particular row address; and

output a row signal defining whether the particular row address corresponds to a black pixel cell row;

an input operable to receive an enable signal; and

an output operable to:

generate, in response to the row signal defining the particular row address corresponds to a black pixel cell row and the input receiving an enable signal, an output signal instructing the shunting circuit to couple the plurality of column lines; and

generate, in response to either the row signal defining the particular row address does not correspond to a black pixel cell row or the input not receiving an enable signal, an output signal instructing the shunting circuit to de-couple the plurality of column lines.

19. An imaging system comprising:

a pixel array comprising:

a plurality of pixel cells arranged in a plurality of columns and a plurality of rows; and

a plurality of column lines, wherein each column line corresponds to a separate column of the plurality of columns and wherein each column line couples the pixel cells of the separate column together;

column circuitry coupled to each column line of the plurality of column lines, wherein the column circuitry is operable to sample and process signals generated by the plurality of pixel cells;

shunting circuitry operable to either couple or de-couple the plurality of column lines together; and

control circuitry operable to:

instruct the shunting circuitry to couple the plurality of column lines together during an optical black pixel readout phase of the imaging system; and

instruct the shunting circuitry to de-couple the plurality of column lines during active pixel cell readout phase of the imaging system, wherein:

the column circuitry comprises a voltage line (“VLN”) bias block including at least a first VLN bias transistor and a second VLN bias transistor arranged in a cascode configuration; and

the shunting circuitry comprises at least first shunting transistors coupled to a drain of the first VLN bias transistor and a second shunting transistor coupled to a drain of the second VLN bias transistor.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034037/0711 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2010
From: MO, YAOWU; XU, CHEN; CHEN, YANDONG
To: APTINA IMAGING CORPORATION
Reel/Frame 024705/0196 →