Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
A semiconductor device has a base carrier with first and second opposing surfaces. A plurality of cavities and base leads between the cavities is formed in the first surface of the base carrier. The first set of base leads can have a different height or similar height as the second set of base leads. A concave capture pad can be formed over the second set of base leads. Alternatively, a plurality of openings can be formed in the base carrier and the semiconductor die mounted to the openings. A semiconductor die is mounted between a first set of the base leads and over a second set of the base leads. An encapsulant is deposited over the die and base carrier. A portion of the second surface of the base carrier is removed to separate the base leads. An interconnect structure is formed over the encapsulant and base leads.
1. A method of making a semiconductor device, comprising:
providing a base substrate having first and second opposing surfaces;
forming a plurality of cavities and base leads between the cavities in the first surface of the base substrate, wherein the cavities create multiple rows of the base leads including a first set of base leads and a second set of base leads;
mounting a first semiconductor die between the first set of the base leads and on the second set of the base leads including a concave capture pad formed in the second set of base leads;
stacking a second semiconductor die over the first semiconductor die;
depositing an encapsulant over the first semiconductor die, second semiconductor die, and base substrate such that the first set of base leads provide vertical interconnect through the encapsulant around the first semiconductor die;
removing a portion of the second surface of the base substrate to separate the base leads; and
forming an interconnect structure over the encapsulant and base leads, the interconnect structure being electrically connected to the base leads and second semiconductor die.
2. The method of claim 1 , wherein the first set of base leads has a different height than the second set of base leads.
3. The method of claim 1 , wherein the first set of base leads has a similar height as the second set of base leads.
4. A method of making a semiconductor device, comprising:
providing a base substrate having first and second opposing surfaces;
forming a plurality of cavities and base leads between the cavities in the first surface of the base substrate, wherein the cavities create multiple rows of the base leads including a first set of base leads and a second set of base leads, wherein the second set of base leads includes a concave capture pad;
forming a plurality of openings in the base substrate between the first set of base leads and second set of base leads;
mounting a first semiconductor die to the base substrate and on the openings in the base substrate;
stacking a second semiconductor die over the first semiconductor die;
depositing a first insulating layer over the first semiconductor die, second semiconductor die, and base substrate;
removing a portion of the second surface of the base substrate to separate the base leads; and
forming an interconnect structure over the first insulating layer and base leads, the interconnect structure being electrically connected to the base leads and second semiconductor die.
5. The method of claim 4 , further including mounting the first semiconductor die between the first set of base lead and over the second set of the base leads.
6. The method of claim 5 , further including forming a concave capture pad over the second set of base leads.
7. The method of claim 4 , further including forming a second insulating layer over the base carrier prior to mounting the first semiconductor die.
8. The method of claim 4 , further including:
stacking a plurality of the semiconductor devices; and
electrically connecting the stacked semiconductor devices through the interconnect structure and base leads.
9. A method of making a semiconductor device, comprising:
providing a base substrate having a plurality of base leads in multiple rows, the base leads including a first set of base leads and a second set of base leads, wherein the second set of base leads includes a concave capture pad;
mounting a first semiconductor die to the base substrate between the first set of the base leads and on the second set of the base leads;
stacking a second semiconductor die over the first semiconductor die;
depositing an insulating layer over the first semiconductor die, second semiconductor die, and base substrate;
removing a portion of the base substrate to separate the base leads;
forming an interconnect structure over the insulating layer and base leads, the interconnect structure being electrically connected to the base leads and the second semiconductor die;
stacking a plurality of the semiconductor devices; and
electrically connecting the stacked semiconductor devices through the interconnect structure and base leads.
10. The method of claim 9 , further including forming a concave capture pad over the second set of base leads.
11. The method of claim 9 , further including forming a concave capture pad in the base plate.
12. The method of claim 9 , further including:
forming a plurality of openings in the base plate; and
mounting the first semiconductor die over the openings in the base plate.