Integration process to improve focus leveling within a lot process variation
A method of improving the focus leveling response of a semiconductor wafer is described. The method includes combining organic and inorganic or metallic near infrared (NIR) hardmask on a semiconductor substrate; forming an anti-reflective coating (ARC) layer on the combined organic NIR-absorption and the inorganic or metallic NIR-absorption hardmask; and forming a photoresist layer on the ARC layer. A semiconductor structure is also described including a substrate, a resist layer located over the structure; and an absorptive layer located over the substrate. The absorptive layer includes an inorganic or metallic NIR-absorbing hardmask layer.
1. A semiconductor structure comprising:
a substrate;
a resist layer located over the structure; and
an absorptive layer located over the substrate, wherein the absorptive layer includes an inorganic or metallic near infra red dye (NIR)-absorbing hardmask layer.
2. The semiconductor structure of claim 1 , wherein the absorptive layer further includes an organic NIR-absorbing layer.
3. The semiconductor structure of claim 1 , wherein the inorganic or metallic NIR-absorbing hardmask layer absorbs a wavelength approximately between 600 and 1200 nanometers.
4. The semiconductor structure of claim 1 , wherein the NIR includes a wavelength approximately between 800 and 1200 nanometers.
5. The semiconductor structure of claim 1 , further comprising an anti-reflective coating (ARC) layer formed on the inorganic or metallic NIR-absorbing layer.
6. The semiconductor structure of claim 1 , wherein the absorptive layer is located interposed between the resist layer and the substrate layer.
7. The semiconductor structure of claim 1 , wherein the absorptive layer absorbs a predetermined diffraction light.
8. A method for improving optical sensor measurements in a semiconductor wafer, the method combining:
forming an inorganic or metallic near infra red dye (NIR)-absorbing hardmask on a dielectric layer, the dielectric layer formed on a semiconductor substrate;
forming an organic NIR-absorbing layer on the inorganic NIR or metallic hardmask; and
forming an anti-reflective coating (ARC) layer on the organic NIR-absorbing layer.
9. The method for improving optical sensor measurement as recited in claim 8 , further comprising forming a photoresist layer on the ARC layer.
10. The method for improving optical sensor measurement as recited in claim 8 , wherein the inorganic or metallic NIR-absorbing hardmask includes TiN.
11. The method for improving optical sensor measurement as recited in claim 8 , wherein the inorganic or metallic NIR-absorbing hardmask and the organic NIR-absorbing layer form an absorptive layer
12. The method for improving optical sensor measurement as recited in claim 8 , wherein the ARC includes Si.
13. The method for improving optical sensor measurement as recited in claim 8 , wherein the NIR includes a wavelength approximately between 800 and 1200 nanometers.
14. A method for focus leveling a semiconductor wafer, the method comprising:
forming an absorptive layer on a semiconductor substrate, the absorptive layer including a combination of inorganic or metallic near infra red dye (NIR)-absorbing hardmask and organic or metallic NIR-absorbing layer;
forming an anti-reflective coating (ARC) layer on the absorptive layer; and
forming a photoresist layer on the ARC layer.
15. The method of focus leveling as recited in claim 14 , wherein the inorganic or metallic hardmask layer includes TiN.
16. The method of focus leveling as recited in claim 14 , wherein the ARC layer includes silicon.
17. The method of focus leveling as recited in claim 14 , wherein the inorganic or metallic NIR-absorbing hardmask and the organic NIR-absorbing layer form an absorptive layer.
18. A semiconductor structure comprising:
a substrate;
a resist layer located over the structure;
an absorptive layer located over the substrate, wherein the absorptive layer includes an inorganic or metallic near infra red dye (NIR)-absorbing hardmask layer; and
an anti-reflective coating (ARC) layer formed on the inorganic or metallic NIR-absorbing layer wherein the anti-reflective coating (ARC) layer includes silicon.
19. The semiconductor structure of claim 18 , wherein the absorptive layer further includes an organic NIR-absorbing layer.
20. The semiconductor structure of claim 19 , wherein the organic NIR-absorbing layer is an organic planarizing layer (OPL).
21. The semiconductor structure of claim 18 , wherein the inorganic or metallic NIR-absorbing hardmask layer absorbs a wavelength approximately between 600 and 1200 nanometers.
22. The semiconductor structure of claim 18 , wherein the NIR includes a wavelength approximately between 800 and 1200 nanometers.
23. The semiconductor structure of claim 18 , wherein the absorptive layer is located interposed between the resist layer and the substrate layer.
24. The semiconductor structure of claim 18 , wherein the absorptive layer absorbs a predetermined diffraction light.
25. A semiconductor structure comprising:
a substrate;
a resist layer located over the structure; and
an absorptive layer located over the substrate, wherein the absorptive layer includes an inorganic or metallic near infra red dye (NIR)-absorbing hardmask layer and an organic NIR-absorbing layer wherein the organic NIR-absoring layer is an organic planarizing layer (OPL).
26. The semiconductor structure of claim 25 , wherein the inorganic or metallic NIR-absorbing hardmask layer absorbs a wavelength approximately between 600 and 1200 nanometers.
27. The semiconductor structure of claim 25 , wherein the NIR includes a wavelength approximately between 800 and 1200 nanometers.
28. The semiconductor structure of claim 25 , further comprising an anti-reflective coating (ARC) layer formed on the inorganic or metallic NIR-absorbing layer.
29. The semiconductor structure of claim 28 , wherein the ARC layer includes silicon.
30. The semiconductor structure of claim 25 , wherein the absorptive layer is located interposed between the resist layer and the substrate layer.
31. The semiconductor structure of claim 25 , wherein the absorptive layer absorbs a predetermined diffraction light.